/*
 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
 */

/dts-v1/;

#include "gemini.dtsi"
#include <dt-bindings/input/input.h>

/ {
	model = "D-Link DIR-685 Xtreme N Storage Router";
	compatible = "dlink,dir-685", "cortina,gemini";
	#address-cells = <1>;
	#size-cells = <1>;

	memory {
		/* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
		device_type = "memory";
		reg = <0x00000000 0x8000000>;
	};

	chosen {
		stdout-path = "uart0:115200n8";
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		button-esc {
			debounce_interval = <50>;
			wakeup-source;
			linux,code = <KEY_ESC>;
			label = "reset";
			/* Collides with LPC_LAD[0], UART DCD, SSP 97RST */
			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
		};
		button-eject {
			debounce_interval = <50>;
			wakeup-source;
			linux,code = <KEY_EJECTCD>;
			label = "unmount";
			/* Collides with LPC LFRAME, UART RTS, SSP TXD */
			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
		};
	};

	vdisp: regulator {
		compatible = "regulator-fixed";
		regulator-name = "display-power";
		regulator-min-microvolt = <3600000>;
		regulator-max-microvolt = <3600000>;
		/* Collides with LCD E */
		gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	spi {
		compatible = "spi-gpio";
		#address-cells = <1>;
		#size-cells = <0>;

		/* Collides with IDE pins, that's cool (we do not use them) */
		gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
		gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
		/* Collides with pflash CE1, not so cool */
		cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
		num-chipselects = <1>;

		panel: display@0 {
			compatible = "dlink,dir-685-panel", "ilitek,ili9322";
			reg = <0>;
			/* 50 ns min period = 20 MHz */
			spi-max-frequency = <20000000>;
			spi-cpol; /* Clock active low */
			vcc-supply = <&vdisp>;
			iovcc-supply = <&vdisp>;
			vci-supply = <&vdisp>;

			port {
				panel_in: endpoint {
					remote-endpoint = <&display_out>;
				};
			};
		};
	};

	leds {
		compatible = "gpio-leds";
		led-wps {
			label = "dir685:blue:WPS";
			/* Collides with ICE */
			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};
		/*
		 * These two LEDs are on the side of the device.
		 * For electrical reasons, both LEDs cannot be active
		 * at the same time so only blue or orange can on at
		 * one time. Enabling both makes the LED go dark.
		 * The LEDs both sit inside the unmount button and the
		 * label on the case says "unmount".
		 */
		led-blue-hd {
			label = "dir685:blue:HD";
			/* Collides with LPC_SERIRQ, UART DTR, SSP FSC pins */
			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
		led-orange-hd {
			label = "dir685:orange:HD";
			/* Collides with LPC_LAD[2], UART DSR, SSP ECLK pins */
			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};

	/*
	 * This is a Sunon Maglev GM0502PFV2-8 cooling fan @10000 RPM.
	 * Since the platform has no temperature sensor, this is controlled
	 * from userspace by using the hard disks S.M.A.R.T. temperature
	 * sensor. It is turned on when the temperature exceeds 46 degrees
	 * and turned off when the temperatures goes below 41 degrees
	 * (celsius).
	 */
	gpio-fan {
		compatible = "gpio-fan";
		/* Collides with IDE */
		gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
		gpio-fan,speed-map = <0 0>, <10000 1>;
		#cooling-cells = <2>;
	};

	/*
	 * The touchpad input is connected to a GPIO bit-banged
	 * I2C bus.
	 */
	gpio-i2c {
		compatible = "i2c-gpio";
		/* Collides with ICE */
		sda-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
		#address-cells = <1>;
		#size-cells = <0>;

		touchkeys@26 {
			compatible = "dlink,dir685-touchkeys";
			reg = <0x26>;
			interrupt-parent = <&gpio0>;
			/* Collides with NAND flash */
			interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
		};
	};

	soc {
		flash@30000000 {
			/*
			 * Flash access is by default disabled, because it
			 * collides with the Chip Enable signal for the display
			 * panel, that reuse the parallel flash Chip Select 1
			 * (CS1). Enabling flash makes graphics stop working.
			 *
			 * We might be able to hack around this by letting
			 * GPIO poke around in the flash controller registers.
			 */
			/* status = "okay"; */
			/* 32MB of flash */
			reg = <0x30000000 0x02000000>;

			/*
			 * This "RedBoot" is the Storlink derivative.
			 */
			partition@0 {
				label = "RedBoot";
				reg = <0x00000000 0x00040000>;
				read-only;
			};
			/*
			 * Between the boot loader and the rootfs is the kernel
			 * in a custom Storlink format flashed from the boot
			 * menu. The rootfs is in squashfs format.
			 */
			partition@1800c0 {
				label = "rootfs";
				reg = <0x001800c0 0x01dbff40>;
				read-only;
			};
			partition@1f40000 {
				label = "upgrade";
				reg = <0x01f40000 0x00040000>;
				read-only;
			};
			partition@1f80000 {
				label = "rgdb";
				reg = <0x01f80000 0x00040000>;
				read-only;
			};
			/*
			 * This partition contains MAC addresses for WAN,
			 * WLAN and LAN, and the country code (for wireless
			 * I guess).
			 */
			partition@1fc0000 {
				label = "nvram";
				reg = <0x01fc0000 0x00020000>;
				read-only;
			};
			partition@1fe0000 {
				label = "LangPack";
				reg = <0x01fe0000 0x00020000>;
				read-only;
			};
		};

		syscon: syscon@40000000 {
			pinctrl {
				/*
				 * gpio0bgrp cover line 5, 6 used by TK I2C
				 * gpio0bgrp cover line 7 used by WPS LED
				 * gpio0cgrp cover line 8, 13 used by keys
				 *           and 11, 12 used by the HD LEDs
				 * gpio0egrp cover line 16 used by VDISP
				 * gpio0fgrp cover line 17 used by TK IRQ
				 * gpio0ggrp cover line 20 used by panel CS
				 * gpio0hgrp cover line 21,22 used by RTL8366RB
				 */
				gpio0_default_pins: pinctrl-gpio0 {
					mux {
						function = "gpio0";
						groups = "gpio0bgrp",
						"gpio0cgrp",
						"gpio0egrp",
						"gpio0fgrp",
						"gpio0ggrp",
						"gpio0hgrp";
					};
				};
				/*
				 * gpio1bgrp cover line 5,8,7 used by panel SPI
				 * also line 6 used by the fan
				 *
				 */
				gpio1_default_pins: pinctrl-gpio1 {
					mux {
						function = "gpio1";
						groups = "gpio1bgrp";
					};
				};
			};
		};

		sata: sata@46000000 {
			cortina,gemini-ata-muxmode = <0>;
			cortina,gemini-enable-sata-bridge;
			status = "okay";
		};

		gpio0: gpio@4d000000 {
			pinctrl-names = "default";
			pinctrl-0 = <&gpio0_default_pins>;
		};

		gpio1: gpio@4e000000 {
			pinctrl-names = "default";
			pinctrl-0 = <&gpio1_default_pins>;
		};

		pci@50000000 {
			status = "okay";
			interrupt-map-mask = <0xf800 0 0 7>;
			interrupt-map =
				<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
				<0x4800 0 0 2 &pci_intc 1>,
				<0x4800 0 0 3 &pci_intc 2>,
				<0x4800 0 0 4 &pci_intc 3>,
				<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
				<0x5000 0 0 2 &pci_intc 2>,
				<0x5000 0 0 3 &pci_intc 3>,
				<0x5000 0 0 4 &pci_intc 0>,
				<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
				<0x5800 0 0 2 &pci_intc 3>,
				<0x5800 0 0 3 &pci_intc 0>,
				<0x5800 0 0 4 &pci_intc 1>,
				<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
				<0x6000 0 0 2 &pci_intc 0>,
				<0x6000 0 0 3 &pci_intc 1>,
				<0x6000 0 0 4 &pci_intc 2>;
		};

		ata@63000000 {
			status = "okay";
		};

		display-controller@6a000000 {
			status = "okay";

			port@0 {
				reg = <0>;
				display_out: endpoint {
					remote-endpoint = <&panel_in>;
				};
			};
		};
	};
};
