/*
 * clock specification for Xilinx ZynqMP ep108 development board
 *
 * (C) Copyright 2015, Xilinx, Inc.
 *
 * Michal Simek <michal.simek@xilinx.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 */

/ {
	misc_clk: misc_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};

	i2c_clk: i2c_clk {
		compatible = "fixed-clock";
		#clock-cells = <0x0>;
		clock-frequency = <111111111>;
	};

	sata_clk: sata_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <75000000>;
	};

	clk100: clk100 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <100000000>;
	};

	clk600: clk600 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <600000000>;
	};
};

&can0 {
	clocks = <&misc_clk &misc_clk>;
};

&can1 {
	clocks = <&misc_clk &misc_clk>;
};

&fpd_dma_chan1 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan2 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan3 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan4 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan5 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan6 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan7 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan8 {
	clocks = <&clk600>, <&clk100>;
};

&gem0 {
	clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
};

&gpio {
	clocks = <&misc_clk>;
};

&i2c0 {
	clocks = <&i2c_clk>;
};

&i2c1 {
	clocks = <&i2c_clk>;
};

&sata {
	clocks = <&sata_clk>;
};

&sdhci0 {
	clocks = <&misc_clk>, <&misc_clk>;
};

&sdhci1 {
	clocks = <&misc_clk>, <&misc_clk>;
};

&spi0 {
	clocks = <&misc_clk &misc_clk>;
};

&spi1 {
	clocks = <&misc_clk &misc_clk>;
};

&uart0 {
	clocks = <&misc_clk &misc_clk>;
};

&usb0 {
	clocks = <&misc_clk>, <&misc_clk>;
};

&usb1 {
	clocks = <&misc_clk>, <&misc_clk>;
};

&watchdog0 {
	clocks= <&misc_clk>;
};
