* Freescale i.MX6 PCIe interface

This PCIe host controller is based on the Synopsis Designware PCIe IP
and thus inherits all the common properties defined in designware-pcie.txt.

Required properties:
- compatible: "fsl,imx6q-pcie"
- reg: base addresse and length of the pcie controller
- interrupts: A list of interrupt outputs of the controller. Must contain an
  entry for each entry in the interrupt-names property.
- interrupt-names: Must include the following entries:
	- "msi": The interrupt that is asserted when an MSI is received
- clock-names: Must include the following additional entries:
	- "pcie_phy"

Example:

	pcie@0x01000000 {
		compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
		reg = <0x01ffc000 0x4000>;
		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";
		ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000
			  0x81000000 0 0          0x01f80000 0 0x00010000
			  0x82000000 0 0x01000000 0x01000000 0 0x00f00000>;
		num-lanes = <1>;
		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "msi";
		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0x7>;
		interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
		                <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
		                <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
		                <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clks 144>, <&clks 206>, <&clks 189>;
		clock-names = "pcie", "pcie_bus", "pcie_phy";
	};
