• Ashok Kumar's avatar
    irqchip/gic-v3-its: Fix double ICC_EOIR write for LPI in EOImode==1 · 004fa08d
    Ashok Kumar authored
    When the GIC is using EOImode==1, the EOI is done immediately,
    leaving the deactivation to be performed when the EOI was
    previously done.
    
    Unfortunately, the ITS is not aware of the EOImode at all, and
    blindly EOIs the interrupt again. On most systems, this is ignored
    (despite being a programming error), but some others do raise a
    SError exception as there is no priority drop to perform for this
    interrupt.
    
    The fix is to stop trying to be clever, and always call into the
    underlying GIC to perform the right access, irrespective of the
    more we're in.
    
    [Marc: Reworked commit message]
    
    Fixes: 0b996fd3 ("irqchip/GICv3: Convert to EOImode == 1")
    Cc: stable@vger.kernel.org
    Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
    Signed-off-by: default avatarAshok Kumar <ashoks@broadcom.com>
    Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
    004fa08d
irq-gic-v3-its.c 38.2 KB