• James Morse's avatar
    KVM: arm64: Handle RAS SErrors from EL1 on guest exit · 3368bd80
    James Morse authored
    We expect to have firmware-first handling of RAS SErrors, with errors
    notified via an APEI method. For systems without firmware-first, add
    some minimal handling to KVM.
    
    There are two ways KVM can take an SError due to a guest, either may be a
    RAS error: we exit the guest due to an SError routed to EL2 by HCR_EL2.AMO,
    or we take an SError from EL2 when we unmask PSTATE.A from __guest_exit.
    
    For SError that interrupt a guest and are routed to EL2 the existing
    behaviour is to inject an impdef SError into the guest.
    
    Add code to handle RAS SError based on the ESR. For uncontained and
    uncategorized errors arm64_is_fatal_ras_serror() will panic(), these
    errors compromise the host too. All other error types are contained:
    For the fatal errors the vCPU can't make progress, so we inject a virtual
    SError. We ignore contained errors where we can make progress as if
    we're lucky, we may not hit them again.
    
    If only some of the CPUs support RAS the guest will see the cpufeature
    sanitised version of the id registers, but we may still take RAS SError
    on this CPU. Move the SError handling out of handle_exit() into a new
    handler that runs before we can be preempted. This allows us to use
    this_cpu_has_cap(), via arm64_is_ras_serror().
    Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
    Signed-off-by: default avatarJames Morse <james.morse@arm.com>
    Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    3368bd80
arm.c 34.3 KB