AMD-Xilinx zynqmp platform contains on-chip sram memory (OCM).
R5 cores can access OCM and access is faster than DDR memory but slower
than TCM memories available. Sram region can have optional multiple
power-domains. Platform management firmware is responsible
to operate these power-domains.
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Link: https://lore.kernel.org/r/20240830173735.279432-1-tanmay.shah@amd.com
[Fixed dma_addr_t type cast when calling rproc_mem_entry_init()]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>