• Stephane Eranian's avatar
    perf/x86/amd: Enable branch sampling priv level filtering · 8910075d
    Stephane Eranian authored
    
    
    The AMD Branch Sampling features does not provide hardware filtering by
    privilege level. The associated PMU counter does but not the branch sampling
    by itself. Given how BRS operates there is a possibility that BRS captures
    kernel level branches even though the event is programmed to count only at
    the user level.
    
    Implement a workaround in software by removing the branches which belong to
    the wrong privilege level. The privilege level is evaluated on the target of
    the branch and not the source so as to be compatible with other architectures.
    As a consequence of this patch, the number of entries in the
    PERF_RECORD_BRANCH_STACK buffer may be less than the maximum (16).  It could
    even be zero. Another consequence is that consecutive entries in the branch
    stack may not reflect actual code path and may have discontinuities, in case
    kernel branches were suppressed. But this is no different than what happens
    on other architectures.
    Signed-off-by: default avatarStephane Eranian <eranian@google.com>
    Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Link: https://lore.kernel.org/r/20220322221517.2510440-6-eranian@google.com
    8910075d
brs.c 7.29 KB