• Conor Dooley's avatar
    riscv: dts: microchip: move the mpfs' pci node to -fabric.dtsi · 99d451a7
    Conor Dooley authored
    In today's edition of moving things around:
    
    The PCIe root port on PolarFire SoC is more part of the FPGA than of
    the Core Complex. It is located on the other side of the chip and,
    apart from its interrupts, most of its configuration is determined
    by the FPGA bitstream rather. This includes:
    
    - address translation in both directions
    - the addresses at which the config and data regions appear to the
      core complex
    - the clocks used by the AXI bus
    - the plic interrupt used
    
    Moving the PCIe node to the -fabric.dtsi makes it clearer than a
    singular configuration for root port is not correct & allows the
    base SoC dtsi to be more easily included.
    Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
    99d451a7
mpfs.dtsi 11.2 KB