The LiteX framework provides a convenient and efficient infrastructure
to create FPGA Cores/SoCs.

We have implemented LiteX support for a couple of opensource MIPS
CPU cores including microAptiv UP from MIPS, GS232 from Loongson,
and CDIM from CQU.

For this platform, devicetree is generated by litex python scripts
so there is no devicetree addition necessary.

Link: https://github.com/enjoy-digital/litex/pull/1990Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>