• Adrian Hunter's avatar
    x86/insn: Add support for REX2 prefix to the instruction decoder logic · eada38d5
    Adrian Hunter authored
    Intel Advanced Performance Extensions (APX) uses a new 2-byte prefix named
    REX2 to select extended general purpose registers (EGPRs) i.e. r16 to r31.
    
    The REX2 prefix is effectively an extended version of the REX prefix.
    
    REX2 and EVEX are also used with PUSH/POP instructions to provide a
    Push-Pop Acceleration (PPX) hint. With PPX hints, a CPU will attempt to
    fast-forward register data between matching PUSH and POP instructions.
    
    REX2 is valid only with opcodes in maps 0 and 1. Similar extension for
    other maps is provided by the EVEX prefix, covered in a separate patch.
    
    Some opcodes in maps 0 and 1 are reserved under REX2. One of these is used
    for a new 64-bit absolute direct jump instruction JMPABS.
    
    Refer to the Intel Advanced Performance Extensions (Intel APX) Architecture
    Specification for details.
    
    Define a code value for the REX2 prefix (INAT_PFX_REX2), and add attribute
    flags for opcodes reserved under REX2 (INAT_NO_REX2) and to identify
    opcodes (only JMPABS) that require a mandatory REX2 prefix
    (INAT_REX2_VARIANT).
    
    Amend logic to read the REX2 prefix and get the opcode attribute for the
    map number (0 or 1) encoded in the REX2 prefix.
    
    Amend the awk script that generates the attribute tables from the opcode
    map, to recognise "REX2" as attribute INAT_PFX_REX2, and "(!REX2)"
    as attribute INAT_NO_REX2, and "(REX2)" as attribute INAT_REX2_VARIANT.
    Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
    Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
    Link: https://lore.kernel.org/r/20240502105853.5338-6-adrian.hunter@intel.com
    eada38d5
insn.c 18 KB