• Toshi Kani's avatar
    x86/mm: Add TLB purge to free pmd/pte page interfaces · 5e0fb5df
    Toshi Kani authored
    ioremap() calls pud_free_pmd_page() / pmd_free_pte_page() when it creates
    a pud / pmd map.  The following preconditions are met at their entry.
     - All pte entries for a target pud/pmd address range have been cleared.
     - System-wide TLB purges have been peformed for a target pud/pmd address
       range.
    
    The preconditions assure that there is no stale TLB entry for the range.
    Speculation may not cache TLB entries since it requires all levels of page
    entries, including ptes, to have P & A-bits set for an associated address.
    However, speculation may cache pud/pmd entries (paging-structure caches)
    when they have P-bit set.
    
    Add a system-wide TLB purge (INVLPG) to a single page after clearing
    pud/pmd entry's P-bit.
    
    SDM 4.10.4.1, Operation that Invalidate TLBs and Paging-Structure Caches,
    states that:
      INVLPG invalidates all paging-structure caches associated with the
      current PCID regardless of the liner addresses to which they correspond.
    
    Fixes: 28ee90fe ("x86/mm: implement free pmd/pte page interfaces")
    Signed-off-by: default avatarToshi Kani <toshi.kani@hpe.com>
    Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    Cc: mhocko@suse.com
    Cc: akpm@linux-foundation.org
    Cc: hpa@zytor.com
    Cc: cpandya@codeaurora.org
    Cc: linux-mm@kvack.org
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: Joerg Roedel <joro@8bytes.org>
    Cc: stable@vger.kernel.org
    Cc: Andrew Morton <akpm@linux-foundation.org>
    Cc: Michal Hocko <mhocko@suse.com>
    Cc: "H. Peter Anvin" <hpa@zytor.com>
    Cc: <stable@vger.kernel.org>
    Link: https://lkml.kernel.org/r/20180627141348.21777-4-toshi.kani@hpe.com
    5e0fb5df
pgtable.c 18.8 KB