• Vineet Gupta's avatar
    ARC: [SMP] Enable icache coherency · 2328af0c
    Vineet Gupta authored
    icaches are not snooped hence not cohrent in SMP setups which means
    kernel has to do cross core calls to ensure the same.
    
    The leaf routine __ic_line_inv_vaddr() now does cross core calls.
    
    __sync_icache_dcache() is affected due to this:
    
    * local dcache line flushed ahead of remote icache inv requests
    * can't disable interrupts anymore, since
          __ic_line_inv_vaddr()->on_each_cpu() can deadlock.
    
    | WARNING: CPU: 0 PID: 1 at kernel/smp.c:374
    | smp_call_function_many+0x25a/0x2c4()
    |
    |  init_kprobes+0x90/0xc8
    |     register_kprobe+0x1d6/0x510
    |	__sync_icache_dcache+0x28/0x80
    |
    |	    DISABLE IRQ
    |
    |	    __ic_line_inv_vaddr
    |		on_each_cpu
    |		     smp_call_function_many+0x25a/0x2c4   --> WARN
    |			__ic_line_inv_vaddr_local
    |	    __dc_line_op
    
    * TODO: Needs to use mask of relevant CPUs to avoid broadcasting
    Signed-off-by: default avatarNoam Camus <noamc@ezchip.com>
    Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
    2328af0c
cache_arc700.c 20.6 KB