Commit 0a6e7e41 authored by Bartosz Golaszewski's avatar Bartosz Golaszewski

Merge tag 'intel-gpio-v5.15-1' of...

Merge tag 'intel-gpio-v5.15-1' of gitolite.kernel.org:pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-next

intel-gpio for v5.15-1

* Rework DesignWare driver to use software nodes instead of platform data
* Drop duplication of forward declaration for ACPI in consumer.h
* Get rid of legacy PCI PM code in ML IOH driver

The following is an automated git shortlog grouped by driver:

dwapb:
 -  Get rid of legacy platform data
 -  Read GPIO base from gpio-base property
 -  Unify ACPI enumeration checks in get_irq() and configure_irqs()

gpiolib:
 -  Deduplicate forward declaration in the consumer.h header

mfd:
 -  intel_quark_i2c_gpio: Convert GPIO to use software nodes

ml-ioh:
 -  Convert to dev_pm_ops
parents e9a13bab 5111c2b6
...@@ -16,7 +16,6 @@ ...@@ -16,7 +16,6 @@
#include <linux/mod_devicetable.h> #include <linux/mod_devicetable.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/platform_data/gpio-dwapb.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/property.h> #include <linux/property.h>
#include <linux/reset.h> #include <linux/reset.h>
...@@ -48,6 +47,7 @@ ...@@ -48,6 +47,7 @@
#define DWAPB_DRIVER_NAME "gpio-dwapb" #define DWAPB_DRIVER_NAME "gpio-dwapb"
#define DWAPB_MAX_PORTS 4 #define DWAPB_MAX_PORTS 4
#define DWAPB_MAX_GPIOS 32
#define GPIO_EXT_PORT_STRIDE 0x04 /* register stride 32 bits */ #define GPIO_EXT_PORT_STRIDE 0x04 /* register stride 32 bits */
#define GPIO_SWPORT_DR_STRIDE 0x0c /* register stride 3*32 bits */ #define GPIO_SWPORT_DR_STRIDE 0x0c /* register stride 3*32 bits */
...@@ -65,6 +65,19 @@ ...@@ -65,6 +65,19 @@
struct dwapb_gpio; struct dwapb_gpio;
struct dwapb_port_property {
struct fwnode_handle *fwnode;
unsigned int idx;
unsigned int ngpio;
unsigned int gpio_base;
int irq[DWAPB_MAX_GPIOS];
};
struct dwapb_platform_data {
struct dwapb_port_property *properties;
unsigned int nports;
};
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP
/* Store GPIO context across system-wide suspend/resume transitions */ /* Store GPIO context across system-wide suspend/resume transitions */
struct dwapb_context { struct dwapb_context {
...@@ -436,21 +449,17 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, ...@@ -436,21 +449,17 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
pirq->irqchip.irq_set_wake = dwapb_irq_set_wake; pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
#endif #endif
if (!pp->irq_shared) { /*
girq->num_parents = pirq->nr_irqs; * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
girq->parents = pirq->irq; * IRQ lane shared between several devices. In that case the parental
girq->parent_handler_data = gpio; * IRQ has to be handled in the shared way so to be properly delivered
girq->parent_handler = dwapb_irq_handler; * to all the connected devices.
} else { */
/* This will let us handle the parent IRQ in the driver */ if (has_acpi_companion(gpio->dev)) {
girq->num_parents = 0; girq->num_parents = 0;
girq->parents = NULL; girq->parents = NULL;
girq->parent_handler = NULL; girq->parent_handler = NULL;
/*
* Request a shared IRQ since where MFD would have devices
* using the same irq pin
*/
err = devm_request_irq(gpio->dev, pp->irq[0], err = devm_request_irq(gpio->dev, pp->irq[0],
dwapb_irq_handler_mfd, dwapb_irq_handler_mfd,
IRQF_SHARED, DWAPB_DRIVER_NAME, gpio); IRQF_SHARED, DWAPB_DRIVER_NAME, gpio);
...@@ -458,6 +467,11 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, ...@@ -458,6 +467,11 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
dev_err(gpio->dev, "error requesting IRQ\n"); dev_err(gpio->dev, "error requesting IRQ\n");
goto err_kfree_pirq; goto err_kfree_pirq;
} }
} else {
girq->num_parents = pirq->nr_irqs;
girq->parents = pirq->irq;
girq->parent_handler_data = gpio;
girq->parent_handler = dwapb_irq_handler;
} }
girq->chip = &pirq->irqchip; girq->chip = &pirq->irqchip;
...@@ -581,9 +595,12 @@ static struct dwapb_platform_data *dwapb_gpio_get_pdata(struct device *dev) ...@@ -581,9 +595,12 @@ static struct dwapb_platform_data *dwapb_gpio_get_pdata(struct device *dev)
pp->ngpio = DWAPB_MAX_GPIOS; pp->ngpio = DWAPB_MAX_GPIOS;
} }
pp->irq_shared = false;
pp->gpio_base = -1; pp->gpio_base = -1;
/* For internal use only, new platforms mustn't exercise this */
if (is_software_node(fwnode))
fwnode_property_read_u32(fwnode, "gpio-base", &pp->gpio_base);
/* /*
* Only port A can provide interrupts in all configurations of * Only port A can provide interrupts in all configurations of
* the IP. * the IP.
...@@ -670,17 +687,12 @@ static int dwapb_gpio_probe(struct platform_device *pdev) ...@@ -670,17 +687,12 @@ static int dwapb_gpio_probe(struct platform_device *pdev)
unsigned int i; unsigned int i;
struct dwapb_gpio *gpio; struct dwapb_gpio *gpio;
int err; int err;
struct dwapb_platform_data *pdata;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct dwapb_platform_data *pdata = dev_get_platdata(dev);
if (!pdata) {
pdata = dwapb_gpio_get_pdata(dev);
if (IS_ERR(pdata))
return PTR_ERR(pdata);
}
if (!pdata->nports) pdata = dwapb_gpio_get_pdata(dev);
return -ENODEV; if (IS_ERR(pdata))
return PTR_ERR(pdata);
gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
if (!gpio) if (!gpio)
......
...@@ -155,11 +155,10 @@ static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) ...@@ -155,11 +155,10 @@ static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
return 0; return 0;
} }
#ifdef CONFIG_PM
/* /*
* Save register configuration and disable interrupts. * Save register configuration and disable interrupts.
*/ */
static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip) static void __maybe_unused ioh_gpio_save_reg_conf(struct ioh_gpio *chip)
{ {
int i; int i;
...@@ -185,7 +184,7 @@ static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip) ...@@ -185,7 +184,7 @@ static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip)
/* /*
* This function restores the register configuration of the GPIO device. * This function restores the register configuration of the GPIO device.
*/ */
static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) static void __maybe_unused ioh_gpio_restore_reg_conf(struct ioh_gpio *chip)
{ {
int i; int i;
...@@ -207,7 +206,6 @@ static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) ...@@ -207,7 +206,6 @@ static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip)
&chip->reg->ioh_sel_reg[i]); &chip->reg->ioh_sel_reg[i]);
} }
} }
#endif
static int ioh_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) static int ioh_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
{ {
...@@ -522,47 +520,23 @@ static void ioh_gpio_remove(struct pci_dev *pdev) ...@@ -522,47 +520,23 @@ static void ioh_gpio_remove(struct pci_dev *pdev)
kfree(chip); kfree(chip);
} }
#ifdef CONFIG_PM static int __maybe_unused ioh_gpio_suspend(struct device *dev)
static int ioh_gpio_suspend(struct pci_dev *pdev, pm_message_t state)
{ {
s32 ret; struct ioh_gpio *chip = dev_get_drvdata(dev);
struct ioh_gpio *chip = pci_get_drvdata(pdev);
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&chip->spinlock, flags); spin_lock_irqsave(&chip->spinlock, flags);
ioh_gpio_save_reg_conf(chip); ioh_gpio_save_reg_conf(chip);
spin_unlock_irqrestore(&chip->spinlock, flags); spin_unlock_irqrestore(&chip->spinlock, flags);
ret = pci_save_state(pdev);
if (ret) {
dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret);
return ret;
}
pci_disable_device(pdev);
pci_set_power_state(pdev, PCI_D0);
ret = pci_enable_wake(pdev, PCI_D0, 1);
if (ret)
dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret);
return 0; return 0;
} }
static int ioh_gpio_resume(struct pci_dev *pdev) static int __maybe_unused ioh_gpio_resume(struct device *dev)
{ {
s32 ret; struct ioh_gpio *chip = dev_get_drvdata(dev);
struct ioh_gpio *chip = pci_get_drvdata(pdev);
unsigned long flags; unsigned long flags;
ret = pci_enable_wake(pdev, PCI_D0, 0);
pci_set_power_state(pdev, PCI_D0);
ret = pci_enable_device(pdev);
if (ret) {
dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret);
return ret;
}
pci_restore_state(pdev);
spin_lock_irqsave(&chip->spinlock, flags); spin_lock_irqsave(&chip->spinlock, flags);
iowrite32(0x01, &chip->reg->srst); iowrite32(0x01, &chip->reg->srst);
iowrite32(0x00, &chip->reg->srst); iowrite32(0x00, &chip->reg->srst);
...@@ -571,10 +545,8 @@ static int ioh_gpio_resume(struct pci_dev *pdev) ...@@ -571,10 +545,8 @@ static int ioh_gpio_resume(struct pci_dev *pdev)
return 0; return 0;
} }
#else
#define ioh_gpio_suspend NULL static SIMPLE_DEV_PM_OPS(ioh_gpio_pm_ops, ioh_gpio_suspend, ioh_gpio_resume);
#define ioh_gpio_resume NULL
#endif
static const struct pci_device_id ioh_gpio_pcidev_id[] = { static const struct pci_device_id ioh_gpio_pcidev_id[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x802E) }, { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x802E) },
...@@ -587,8 +559,9 @@ static struct pci_driver ioh_gpio_driver = { ...@@ -587,8 +559,9 @@ static struct pci_driver ioh_gpio_driver = {
.id_table = ioh_gpio_pcidev_id, .id_table = ioh_gpio_pcidev_id,
.probe = ioh_gpio_probe, .probe = ioh_gpio_probe,
.remove = ioh_gpio_remove, .remove = ioh_gpio_remove,
.suspend = ioh_gpio_suspend, .driver = {
.resume = ioh_gpio_resume .pm = &ioh_gpio_pm_ops,
},
}; };
module_pci_driver(ioh_gpio_driver); module_pci_driver(ioh_gpio_driver);
......
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
#include <linux/clk-provider.h> #include <linux/clk-provider.h>
#include <linux/dmi.h> #include <linux/dmi.h>
#include <linux/i2c.h> #include <linux/i2c.h>
#include <linux/platform_data/gpio-dwapb.h>
#include <linux/property.h> #include <linux/property.h>
/* PCI BAR for register base address */ /* PCI BAR for register base address */
...@@ -28,15 +27,6 @@ ...@@ -28,15 +27,6 @@
#define MFD_ACPI_MATCH_GPIO 0ULL #define MFD_ACPI_MATCH_GPIO 0ULL
#define MFD_ACPI_MATCH_I2C 1ULL #define MFD_ACPI_MATCH_I2C 1ULL
/* The base GPIO number under GPIOLIB framework */
#define INTEL_QUARK_MFD_GPIO_BASE 8
/* The default number of South-Cluster GPIO on Quark. */
#define INTEL_QUARK_MFD_NGPIO 8
/* The DesignWare GPIO ports on Quark. */
#define INTEL_QUARK_GPIO_NPORTS 1
#define INTEL_QUARK_IORES_MEM 0 #define INTEL_QUARK_IORES_MEM 0
#define INTEL_QUARK_IORES_IRQ 1 #define INTEL_QUARK_IORES_IRQ 1
...@@ -111,12 +101,38 @@ static struct resource intel_quark_gpio_res[] = { ...@@ -111,12 +101,38 @@ static struct resource intel_quark_gpio_res[] = {
[INTEL_QUARK_IORES_MEM] = { [INTEL_QUARK_IORES_MEM] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[INTEL_QUARK_IORES_IRQ] = {
.flags = IORESOURCE_IRQ,
},
}; };
static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = { static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
.adr = MFD_ACPI_MATCH_GPIO, .adr = MFD_ACPI_MATCH_GPIO,
}; };
static const struct software_node intel_quark_gpio_controller_node = {
.name = "intel-quark-gpio-controller",
};
static const struct property_entry intel_quark_gpio_portA_properties[] = {
PROPERTY_ENTRY_U32("reg", 0),
PROPERTY_ENTRY_U32("snps,nr-gpios", 8),
PROPERTY_ENTRY_U32("gpio-base", 8),
{ }
};
static const struct software_node intel_quark_gpio_portA_node = {
.name = "portA",
.parent = &intel_quark_gpio_controller_node,
.properties = intel_quark_gpio_portA_properties,
};
static const struct software_node *intel_quark_gpio_node_group[] = {
&intel_quark_gpio_controller_node,
&intel_quark_gpio_portA_node,
NULL
};
static struct mfd_cell intel_quark_mfd_cells[] = { static struct mfd_cell intel_quark_mfd_cells[] = {
[MFD_I2C_BAR] = { [MFD_I2C_BAR] = {
.id = MFD_I2C_BAR, .id = MFD_I2C_BAR,
...@@ -203,35 +219,19 @@ static int intel_quark_gpio_setup(struct pci_dev *pdev) ...@@ -203,35 +219,19 @@ static int intel_quark_gpio_setup(struct pci_dev *pdev)
{ {
struct mfd_cell *cell = &intel_quark_mfd_cells[MFD_GPIO_BAR]; struct mfd_cell *cell = &intel_quark_mfd_cells[MFD_GPIO_BAR];
struct resource *res = intel_quark_gpio_res; struct resource *res = intel_quark_gpio_res;
struct dwapb_platform_data *pdata; int ret;
struct device *dev = &pdev->dev;
res[INTEL_QUARK_IORES_MEM].start = pci_resource_start(pdev, MFD_GPIO_BAR); res[INTEL_QUARK_IORES_MEM].start = pci_resource_start(pdev, MFD_GPIO_BAR);
res[INTEL_QUARK_IORES_MEM].end = pci_resource_end(pdev, MFD_GPIO_BAR); res[INTEL_QUARK_IORES_MEM].end = pci_resource_end(pdev, MFD_GPIO_BAR);
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); res[INTEL_QUARK_IORES_IRQ].start = pci_irq_vector(pdev, 0);
if (!pdata) res[INTEL_QUARK_IORES_IRQ].end = pci_irq_vector(pdev, 0);
return -ENOMEM;
/* For intel quark x1000, it has only one port: portA */
pdata->nports = INTEL_QUARK_GPIO_NPORTS;
pdata->properties = devm_kcalloc(dev, pdata->nports,
sizeof(*pdata->properties),
GFP_KERNEL);
if (!pdata->properties)
return -ENOMEM;
/* Set the properties for portA */
pdata->properties->fwnode = NULL;
pdata->properties->idx = 0;
pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
pdata->properties->irq[0] = pci_irq_vector(pdev, 0);
pdata->properties->irq_shared = true;
cell->platform_data = pdata; ret = software_node_register_node_group(intel_quark_gpio_node_group);
cell->pdata_size = sizeof(*pdata); if (ret)
return ret;
cell->swnode = &intel_quark_gpio_controller_node;
return 0; return 0;
} }
...@@ -274,10 +274,12 @@ static int intel_quark_mfd_probe(struct pci_dev *pdev, ...@@ -274,10 +274,12 @@ static int intel_quark_mfd_probe(struct pci_dev *pdev,
ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0, ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
NULL); NULL);
if (ret) if (ret)
goto err_free_irq_vectors; goto err_unregister_gpio_node_group;
return 0; return 0;
err_unregister_gpio_node_group:
software_node_unregister_node_group(intel_quark_gpio_node_group);
err_free_irq_vectors: err_free_irq_vectors:
pci_free_irq_vectors(pdev); pci_free_irq_vectors(pdev);
err_unregister_i2c_clk: err_unregister_i2c_clk:
...@@ -288,6 +290,7 @@ static int intel_quark_mfd_probe(struct pci_dev *pdev, ...@@ -288,6 +290,7 @@ static int intel_quark_mfd_probe(struct pci_dev *pdev,
static void intel_quark_mfd_remove(struct pci_dev *pdev) static void intel_quark_mfd_remove(struct pci_dev *pdev)
{ {
mfd_remove_devices(&pdev->dev); mfd_remove_devices(&pdev->dev);
software_node_unregister_node_group(intel_quark_gpio_node_group);
pci_free_irq_vectors(pdev); pci_free_irq_vectors(pdev);
intel_quark_unregister_i2c_clk(&pdev->dev); intel_quark_unregister_i2c_clk(&pdev->dev);
} }
......
...@@ -680,10 +680,10 @@ struct acpi_gpio_mapping { ...@@ -680,10 +680,10 @@ struct acpi_gpio_mapping {
unsigned int quirks; unsigned int quirks;
}; };
#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_ACPI)
struct acpi_device; struct acpi_device;
#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_ACPI)
int acpi_dev_add_driver_gpios(struct acpi_device *adev, int acpi_dev_add_driver_gpios(struct acpi_device *adev,
const struct acpi_gpio_mapping *gpios); const struct acpi_gpio_mapping *gpios);
void acpi_dev_remove_driver_gpios(struct acpi_device *adev); void acpi_dev_remove_driver_gpios(struct acpi_device *adev);
...@@ -696,8 +696,6 @@ struct gpio_desc *acpi_get_and_request_gpiod(char *path, int pin, char *label); ...@@ -696,8 +696,6 @@ struct gpio_desc *acpi_get_and_request_gpiod(char *path, int pin, char *label);
#else /* CONFIG_GPIOLIB && CONFIG_ACPI */ #else /* CONFIG_GPIOLIB && CONFIG_ACPI */
struct acpi_device;
static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev, static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev,
const struct acpi_gpio_mapping *gpios) const struct acpi_gpio_mapping *gpios)
{ {
......
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright(c) 2014 Intel Corporation.
*/
#ifndef GPIO_DW_APB_H
#define GPIO_DW_APB_H
#define DWAPB_MAX_GPIOS 32
struct dwapb_port_property {
struct fwnode_handle *fwnode;
unsigned int idx;
unsigned int ngpio;
unsigned int gpio_base;
int irq[DWAPB_MAX_GPIOS];
bool irq_shared;
};
struct dwapb_platform_data {
struct dwapb_port_property *properties;
unsigned int nports;
};
#endif
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