Commit 1ca8c0a7 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'soc-fsl-for-4.19' of...

Merge tag 'soc-fsl-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers

Various updates to soc/fsl for 4.19

Moves DPAA2 DPIO driver from staging to fsl/soc
Adds multiple-pin support to QE gpio driver

* tag 'soc-fsl-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: cleanup Kconfig menu
  soc: fsl: dpio: Convert DPIO documentation to .rst
  staging: fsl-mc: Remove remaining files
  staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl
  staging: fsl-dpaa2: eth: move generic FD defines to DPIO
  soc: fsl: qe: gpio: Add qe_gpio_set_multiple
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 92f06c38 46252108
Copyright 2016 NXP .. include:: <isonum.txt>
DPAA2 DPIO (Data Path I/O) Overview
===================================
:Copyright: |copy| 2016-2018 NXP
This document provides an overview of the Freescale DPAA2 DPIO
drivers
Introduction Introduction
------------ ============
A DPAA2 DPIO (Data Path I/O) is a hardware object that provides A DPAA2 DPIO (Data Path I/O) is a hardware object that provides
interfaces to enqueue and dequeue frames to/from network interfaces interfaces to enqueue and dequeue frames to/from network interfaces
...@@ -27,8 +35,11 @@ provides services that: ...@@ -27,8 +35,11 @@ provides services that:
The Linux DPIO driver consists of 3 primary components-- The Linux DPIO driver consists of 3 primary components--
DPIO object driver-- fsl-mc driver that manages the DPIO object DPIO object driver-- fsl-mc driver that manages the DPIO object
DPIO service-- provides APIs to other Linux drivers for services DPIO service-- provides APIs to other Linux drivers for services
QBman portal interface-- sends portal commands, gets responses QBman portal interface-- sends portal commands, gets responses
::
fsl-mc other fsl-mc other
bus drivers bus drivers
...@@ -45,8 +56,9 @@ The Linux DPIO driver consists of 3 primary components-- ...@@ -45,8 +56,9 @@ The Linux DPIO driver consists of 3 primary components--
| |
hardware hardware
The diagram below shows how the DPIO driver components fit with the other The diagram below shows how the DPIO driver components fit with the other
DPAA2 Linux driver components: DPAA2 Linux driver components::
+------------+ +------------+
| OS Network | | OS Network |
| Stack | | Stack |
...@@ -98,20 +110,29 @@ DPIO service (dpio-service.c, dpaa2-io.h) ...@@ -98,20 +110,29 @@ DPIO service (dpio-service.c, dpaa2-io.h)
Notification handling Notification handling
dpaa2_io_service_register() dpaa2_io_service_register()
dpaa2_io_service_deregister() dpaa2_io_service_deregister()
dpaa2_io_service_rearm() dpaa2_io_service_rearm()
Queuing Queuing
dpaa2_io_service_pull_fq() dpaa2_io_service_pull_fq()
dpaa2_io_service_pull_channel() dpaa2_io_service_pull_channel()
dpaa2_io_service_enqueue_fq() dpaa2_io_service_enqueue_fq()
dpaa2_io_service_enqueue_qd() dpaa2_io_service_enqueue_qd()
dpaa2_io_store_create() dpaa2_io_store_create()
dpaa2_io_store_destroy() dpaa2_io_store_destroy()
dpaa2_io_store_next() dpaa2_io_store_next()
Buffer pool management Buffer pool management
dpaa2_io_service_release() dpaa2_io_service_release()
dpaa2_io_service_acquire() dpaa2_io_service_acquire()
QBman portal interface (qbman-portal.c) QBman portal interface (qbman-portal.c)
...@@ -120,7 +141,9 @@ QBman portal interface (qbman-portal.c) ...@@ -120,7 +141,9 @@ QBman portal interface (qbman-portal.c)
The qbman-portal component provides APIs to do the low level hardware The qbman-portal component provides APIs to do the low level hardware
bit twiddling for operations such as: bit twiddling for operations such as:
-initializing Qman software portals -initializing Qman software portals
-building and sending portal commands -building and sending portal commands
-portal interrupt configuration and processing -portal interrupt configuration and processing
The qbman-portal APIs are not public to other drivers, and are The qbman-portal APIs are not public to other drivers, and are
......
...@@ -6,3 +6,4 @@ DPAA2 Documentation ...@@ -6,3 +6,4 @@ DPAA2 Documentation
:maxdepth: 1 :maxdepth: 1
overview overview
dpio-driver
...@@ -4418,7 +4418,7 @@ DPAA2 DATAPATH I/O (DPIO) DRIVER ...@@ -4418,7 +4418,7 @@ DPAA2 DATAPATH I/O (DPIO) DRIVER
M: Roy Pledge <Roy.Pledge@nxp.com> M: Roy Pledge <Roy.Pledge@nxp.com>
L: linux-kernel@vger.kernel.org L: linux-kernel@vger.kernel.org
S: Maintained S: Maintained
F: drivers/staging/fsl-mc/bus/dpio F: drivers/soc/fsl/dpio
DPAA2 ETHERNET DRIVER DPAA2 ETHERNET DRIVER
M: Ioana Radulescu <ruxandra.radulescu@nxp.com> M: Ioana Radulescu <ruxandra.radulescu@nxp.com>
......
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
#ifndef _SG_SW_QM2_H_ #ifndef _SG_SW_QM2_H_
#define _SG_SW_QM2_H_ #define _SG_SW_QM2_H_
#include "../../../drivers/staging/fsl-mc/include/dpaa2-fd.h" #include <soc/fsl/dpaa2-fd.h>
static inline void dma_to_qm_sg_one(struct dpaa2_sg_entry *qm_sg_ptr, static inline void dma_to_qm_sg_one(struct dpaa2_sg_entry *qm_sg_ptr,
dma_addr_t dma, u32 len, u16 offset) dma_addr_t dma, u32 len, u16 offset)
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
#include "ctrl.h" #include "ctrl.h"
#include "regs.h" #include "regs.h"
#include "sg_sw_qm2.h" #include "sg_sw_qm2.h"
#include "../../../drivers/staging/fsl-mc/include/dpaa2-fd.h" #include <soc/fsl/dpaa2-fd.h>
struct sec4_sg_entry { struct sec4_sg_entry {
u64 ptr; u64 ptr;
......
# #
# Freescale SOC drivers # NXP/Freescale QorIQ series SOC drivers
# #
menu "NXP/Freescale QorIQ SoC drivers"
source "drivers/soc/fsl/qbman/Kconfig" source "drivers/soc/fsl/qbman/Kconfig"
source "drivers/soc/fsl/qe/Kconfig" source "drivers/soc/fsl/qe/Kconfig"
...@@ -16,3 +18,14 @@ config FSL_GUTS ...@@ -16,3 +18,14 @@ config FSL_GUTS
Initially only reading SVR and registering soc device are supported. Initially only reading SVR and registering soc device are supported.
Other guts accesses, such as reading RCW, should eventually be moved Other guts accesses, such as reading RCW, should eventually be moved
into this driver as well. into this driver as well.
config FSL_MC_DPIO
tristate "QorIQ DPAA2 DPIO driver"
depends on FSL_MC_BUS
help
Driver for the DPAA2 DPIO object. A DPIO provides queue and
buffer management facilities for software to interact with
other DPAA2 objects. This driver does not expose the DPIO
objects individually, but groups them under a service layer
API.
endmenu
...@@ -6,3 +6,4 @@ obj-$(CONFIG_FSL_DPAA) += qbman/ ...@@ -6,3 +6,4 @@ obj-$(CONFIG_FSL_DPAA) += qbman/
obj-$(CONFIG_QUICC_ENGINE) += qe/ obj-$(CONFIG_QUICC_ENGINE) += qe/
obj-$(CONFIG_CPM) += qe/ obj-$(CONFIG_CPM) += qe/
obj-$(CONFIG_FSL_GUTS) += guts.o obj-$(CONFIG_FSL_GUTS) += guts.o
obj-$(CONFIG_FSL_MC_DPIO) += dpio/
...@@ -16,7 +16,7 @@ ...@@ -16,7 +16,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/fsl/mc.h> #include <linux/fsl/mc.h>
#include "../../include/dpaa2-io.h" #include <soc/fsl/dpaa2-io.h>
#include "qbman-portal.h" #include "qbman-portal.h"
#include "dpio.h" #include "dpio.h"
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
*/ */
#include <linux/types.h> #include <linux/types.h>
#include <linux/fsl/mc.h> #include <linux/fsl/mc.h>
#include "../../include/dpaa2-io.h" #include <soc/fsl/dpaa2-io.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
......
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/slab.h> #include <linux/slab.h>
#include "../../include/dpaa2-global.h" #include <soc/fsl/dpaa2-global.h>
#include "qbman-portal.h" #include "qbman-portal.h"
......
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
#ifndef __FSL_QBMAN_PORTAL_H #ifndef __FSL_QBMAN_PORTAL_H
#define __FSL_QBMAN_PORTAL_H #define __FSL_QBMAN_PORTAL_H
#include "../../include/dpaa2-fd.h" #include <soc/fsl/dpaa2-fd.h>
struct dpaa2_dq; struct dpaa2_dq;
struct qbman_swp; struct qbman_swp;
......
menuconfig FSL_DPAA menuconfig FSL_DPAA
bool "Freescale DPAA 1.x support" bool "QorIQ DPAA1 framework support"
depends on (FSL_SOC_BOOKE || ARCH_LAYERSCAPE) depends on (FSL_SOC_BOOKE || ARCH_LAYERSCAPE)
select GENERIC_ALLOCATOR select GENERIC_ALLOCATOR
help help
......
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
# #
config QUICC_ENGINE config QUICC_ENGINE
bool "Freescale QUICC Engine (QE) Support" bool "QUICC Engine (QE) framework support"
depends on FSL_SOC && PPC32 depends on FSL_SOC && PPC32
select GENERIC_ALLOCATOR select GENERIC_ALLOCATOR
select CRC32 select CRC32
......
...@@ -83,6 +83,33 @@ static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) ...@@ -83,6 +83,33 @@ static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
spin_unlock_irqrestore(&qe_gc->lock, flags); spin_unlock_irqrestore(&qe_gc->lock, flags);
} }
static void qe_gpio_set_multiple(struct gpio_chip *gc,
unsigned long *mask, unsigned long *bits)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
struct qe_pio_regs __iomem *regs = mm_gc->regs;
unsigned long flags;
int i;
spin_lock_irqsave(&qe_gc->lock, flags);
for (i = 0; i < gc->ngpio; i++) {
if (*mask == 0)
break;
if (__test_and_clear_bit(i, mask)) {
if (test_bit(i, bits))
qe_gc->cpdata |= (1U << (QE_PIO_PINS - 1 - i));
else
qe_gc->cpdata &= ~(1U << (QE_PIO_PINS - 1 - i));
}
}
out_be32(&regs->cpdata, qe_gc->cpdata);
spin_unlock_irqrestore(&qe_gc->lock, flags);
}
static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{ {
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
...@@ -298,6 +325,7 @@ static int __init qe_add_gpiochips(void) ...@@ -298,6 +325,7 @@ static int __init qe_add_gpiochips(void)
gc->direction_output = qe_gpio_dir_out; gc->direction_output = qe_gpio_dir_out;
gc->get = qe_gpio_get; gc->get = qe_gpio_get;
gc->set = qe_gpio_set; gc->set = qe_gpio_set;
gc->set_multiple = qe_gpio_set_multiple;
ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc); ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
if (ret) if (ret)
......
...@@ -92,8 +92,6 @@ source "drivers/staging/clocking-wizard/Kconfig" ...@@ -92,8 +92,6 @@ source "drivers/staging/clocking-wizard/Kconfig"
source "drivers/staging/fbtft/Kconfig" source "drivers/staging/fbtft/Kconfig"
source "drivers/staging/fsl-mc/Kconfig"
source "drivers/staging/fsl-dpaa2/Kconfig" source "drivers/staging/fsl-dpaa2/Kconfig"
source "drivers/staging/wilc1000/Kconfig" source "drivers/staging/wilc1000/Kconfig"
......
...@@ -37,7 +37,6 @@ obj-$(CONFIG_CRYPTO_SKEIN) += skein/ ...@@ -37,7 +37,6 @@ obj-$(CONFIG_CRYPTO_SKEIN) += skein/
obj-$(CONFIG_UNISYSSPAR) += unisys/ obj-$(CONFIG_UNISYSSPAR) += unisys/
obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/ obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/
obj-$(CONFIG_FB_TFT) += fbtft/ obj-$(CONFIG_FB_TFT) += fbtft/
obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
obj-$(CONFIG_FSL_DPAA2) += fsl-dpaa2/ obj-$(CONFIG_FSL_DPAA2) += fsl-dpaa2/
obj-$(CONFIG_WILC1000) += wilc1000/ obj-$(CONFIG_WILC1000) += wilc1000/
obj-$(CONFIG_MOST) += most/ obj-$(CONFIG_MOST) += most/
......
...@@ -455,7 +455,7 @@ static int build_sg_fd(struct dpaa2_eth_priv *priv, ...@@ -455,7 +455,7 @@ static int build_sg_fd(struct dpaa2_eth_priv *priv,
dpaa2_fd_set_format(fd, dpaa2_fd_sg); dpaa2_fd_set_format(fd, dpaa2_fd_sg);
dpaa2_fd_set_addr(fd, addr); dpaa2_fd_set_addr(fd, addr);
dpaa2_fd_set_len(fd, skb->len); dpaa2_fd_set_len(fd, skb->len);
dpaa2_fd_set_ctrl(fd, DPAA2_FD_CTRL_PTA | DPAA2_FD_CTRL_PTV1); dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA | FD_CTRL_PTV1);
if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
enable_tx_tstamp(fd, sgt_buf); enable_tx_tstamp(fd, sgt_buf);
...@@ -508,7 +508,7 @@ static int build_single_fd(struct dpaa2_eth_priv *priv, ...@@ -508,7 +508,7 @@ static int build_single_fd(struct dpaa2_eth_priv *priv,
dpaa2_fd_set_offset(fd, (u16)(skb->data - buffer_start)); dpaa2_fd_set_offset(fd, (u16)(skb->data - buffer_start));
dpaa2_fd_set_len(fd, skb->len); dpaa2_fd_set_len(fd, skb->len);
dpaa2_fd_set_format(fd, dpaa2_fd_single); dpaa2_fd_set_format(fd, dpaa2_fd_single);
dpaa2_fd_set_ctrl(fd, DPAA2_FD_CTRL_PTA | DPAA2_FD_CTRL_PTV1); dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA | FD_CTRL_PTV1);
if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
enable_tx_tstamp(fd, buffer_start); enable_tx_tstamp(fd, buffer_start);
......
...@@ -37,8 +37,8 @@ ...@@ -37,8 +37,8 @@
#include <linux/if_vlan.h> #include <linux/if_vlan.h>
#include <linux/fsl/mc.h> #include <linux/fsl/mc.h>
#include "../../fsl-mc/include/dpaa2-io.h" #include <soc/fsl/dpaa2-io.h>
#include "../../fsl-mc/include/dpaa2-fd.h" #include <soc/fsl/dpaa2-fd.h>
#include "dpni.h" #include "dpni.h"
#include "dpni-cmd.h" #include "dpni-cmd.h"
...@@ -124,21 +124,13 @@ struct dpaa2_eth_swa { ...@@ -124,21 +124,13 @@ struct dpaa2_eth_swa {
#define DPAA2_FD_FRC_FAICFDV 0x0400 #define DPAA2_FD_FRC_FAICFDV 0x0400
/* Error bits in FD CTRL */ /* Error bits in FD CTRL */
#define DPAA2_FD_CTRL_UFD 0x00000004 #define DPAA2_FD_RX_ERR_MASK (FD_CTRL_SBE | FD_CTRL_FAERR)
#define DPAA2_FD_CTRL_SBE 0x00000008 #define DPAA2_FD_TX_ERR_MASK (FD_CTRL_UFD | \
#define DPAA2_FD_CTRL_FSE 0x00000020 FD_CTRL_SBE | \
#define DPAA2_FD_CTRL_FAERR 0x00000040 FD_CTRL_FSE | \
FD_CTRL_FAERR)
#define DPAA2_FD_RX_ERR_MASK (DPAA2_FD_CTRL_SBE | \
DPAA2_FD_CTRL_FAERR)
#define DPAA2_FD_TX_ERR_MASK (DPAA2_FD_CTRL_UFD | \
DPAA2_FD_CTRL_SBE | \
DPAA2_FD_CTRL_FSE | \
DPAA2_FD_CTRL_FAERR)
/* Annotation bits in FD CTRL */ /* Annotation bits in FD CTRL */
#define DPAA2_FD_CTRL_PTA 0x00800000
#define DPAA2_FD_CTRL_PTV1 0x00400000
#define DPAA2_FD_CTRL_ASAL 0x00020000 /* ASAL = 128B */ #define DPAA2_FD_CTRL_ASAL 0x00020000 /* ASAL = 128B */
/* Frame annotation status */ /* Frame annotation status */
......
# SPDX-License-Identifier: GPL-2.0
source "drivers/staging/fsl-mc/bus/Kconfig"
# SPDX-License-Identifier: GPL-2.0
# Freescale Management Complex (MC) bus drivers
obj-$(CONFIG_FSL_MC_BUS) += bus/
# SPDX-License-Identifier: GPL-2.0
#
# DPAA2 fsl-mc bus
#
# Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
#
config FSL_MC_DPIO
tristate "QorIQ DPAA2 DPIO driver"
depends on FSL_MC_BUS
help
Driver for the DPAA2 DPIO object. A DPIO provides queue and
buffer management facilities for software to interact with
other DPAA2 objects. This driver does not expose the DPIO
objects individually, but groups them under a service layer
API.
# SPDX-License-Identifier: GPL-2.0
#
# Freescale Management Complex (MC) bus drivers
#
# Copyright (C) 2014 Freescale Semiconductor, Inc.
#
# MC DPIO driver
obj-$(CONFIG_FSL_MC_DPIO) += dpio/
...@@ -67,6 +67,18 @@ struct dpaa2_fd { ...@@ -67,6 +67,18 @@ struct dpaa2_fd {
#define SG_FINAL_FLAG_MASK 0x1 #define SG_FINAL_FLAG_MASK 0x1
#define SG_FINAL_FLAG_SHIFT 15 #define SG_FINAL_FLAG_SHIFT 15
/* Error bits in FD CTRL */
#define FD_CTRL_ERR_MASK 0x000000FF
#define FD_CTRL_UFD 0x00000004
#define FD_CTRL_SBE 0x00000008
#define FD_CTRL_FLC 0x00000010
#define FD_CTRL_FSE 0x00000020
#define FD_CTRL_FAERR 0x00000040
/* Annotation bits in FD CTRL */
#define FD_CTRL_PTA 0x00800000
#define FD_CTRL_PTV1 0x00400000
enum dpaa2_fd_format { enum dpaa2_fd_format {
dpaa2_fd_single = 0, dpaa2_fd_single = 0,
dpaa2_fd_list, dpaa2_fd_list,
......
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