Commit 230f9846 authored by Rob Herring's avatar Rob Herring

ARM: remove disable_fiq and arch_ret_to_user macros

Now that most platforms don't need disable_fiq and arch_ret_to_user
macros, we can remove the empty macros or empty entry-macro.S files.
Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Acked-by: default avatarJamie Iles <jamie@jamieiles.com>
Acked-by: default avatarNicolas Pitre <nico@linaro.org>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Acked-by: default avatarRyan Mallon <rmallon@gmail.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 243c8654
...@@ -11,14 +11,6 @@ ...@@ -11,14 +11,6 @@
/* IOC / IOMD based hardware */ /* IOC / IOMD based hardware */
#include <asm/hardware/iomd.h> #include <asm/hardware/iomd.h>
.macro disable_fiq
mov r12, #ioc_base_high
.if ioc_base_low
orr r12, r12, #ioc_base_low
.endif
strb r12, [r12, #0x38] @ Disable FIQ register
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
ldr \tmp, =irq_prio_h ldr \tmp, =irq_prio_h
......
...@@ -13,17 +13,11 @@ ...@@ -13,17 +13,11 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/at91_aic.h> #include <mach/at91_aic.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =at91_aic_base @ base virtual address of AIC peripheral ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
ldr \base, [\base] ldr \base, [\base]
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
......
...@@ -21,9 +21,6 @@ ...@@ -21,9 +21,6 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/csp/mm_io.h> #include <mach/csp/mm_io.h>
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =(MM_IO_BASE_INTC0) ldr \base, =(MM_IO_BASE_INTC0)
ldr \irqstat, [\base, #0] @ get status ldr \irqstat, [\base, #0] @ get status
...@@ -77,6 +74,3 @@ ...@@ -77,6 +74,3 @@
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -10,15 +10,9 @@ ...@@ -10,15 +10,9 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/hardware/clps7111.h> #include <asm/hardware/clps7111.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
#error INTSR stride != INTMR stride #error INTSR stride != INTMR stride
#endif #endif
......
/*
* Low-level IRQ helper macros for Cavium Networks platforms
*
* Copyright 2008 Cavium Networks
*
* This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as
* published by the Free Software Foundation.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -11,17 +11,11 @@ ...@@ -11,17 +11,11 @@
#include <mach/io.h> #include <mach/io.h>
#include <mach/irqs.h> #include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =davinci_intc_base ldr \base, =davinci_intc_base
ldr \base, [\base] ldr \base, [\base]
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
ldr \tmp, =davinci_intc_type ldr \tmp, =davinci_intc_type
......
...@@ -10,12 +10,6 @@ ...@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE ldr \base, =IRQ_VIRT_BASE
.endm .endm
......
...@@ -12,16 +12,10 @@ ...@@ -12,16 +12,10 @@
#define IRQ_STAT 0xff000000 /* read */ #define IRQ_STAT 0xff000000 /* read */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mov \base, #IRQ_STAT mov \base, #IRQ_STAT
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, stat, base, tmp .macro get_irqnr_and_base, irqnr, stat, base, tmp
ldrb \stat, [\base] @ get interrupts ldrb \stat, [\base] @ get interrupts
mov \irqnr, #0 mov \irqnr, #0
......
/*
* arch/arm/mach-ep93xx/include/mach/entry-macro.S
* IRQ demultiplexing for EP93xx
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/* arch/arm/mach-exynos4/include/mach/entry-macro.S
*
* Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for EXYNOS4 platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -14,9 +14,6 @@ ...@@ -14,9 +14,6 @@
.equ dc21285_high, ARMCSR_BASE & 0xff000000 .equ dc21285_high, ARMCSR_BASE & 0xff000000
.equ dc21285_low, ARMCSR_BASE & 0x00ffffff .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mov \base, #dc21285_high mov \base, #dc21285_high
.if dc21285_low .if dc21285_low
...@@ -24,9 +21,6 @@ ...@@ -24,9 +21,6 @@
.endif .endif
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, [\base, #0x180] @ get interrupts ldr \irqstat, [\base, #0x180] @ get interrupts
......
...@@ -12,15 +12,9 @@ ...@@ -12,15 +12,9 @@
#define IRQ_STATUS 0x14 #define IRQ_STATUS 0x14
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS)
ldr \irqnr, [\irqstat] ldr \irqnr, [\irqstat]
......
...@@ -8,15 +8,9 @@ ...@@ -8,15 +8,9 @@
* warranty of any kind, whether express or implied. * warranty of any kind, whether express or implied.
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
#if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202)
@ we could use the id register on H7202, but this is not @ we could use the id register on H7202, but this is not
......
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -11,15 +11,9 @@ ...@@ -11,15 +11,9 @@
#include <mach/platform.h> #include <mach/platform.h>
#include <mach/irqs.h> #include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
/* FIXME: should not be using soo many LDRs here */ /* FIXME: should not be using soo many LDRs here */
ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
......
...@@ -16,9 +16,6 @@ ...@@ -16,9 +16,6 @@
* Place - Suite 330, Boston, MA 02111-1307 USA. * Place - Suite 330, Boston, MA 02111-1307 USA.
* *
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c15, c1, 0 mrc p15, 0, \tmp, c15, c1, 0
orr \tmp, \tmp, #(1 << 6) orr \tmp, \tmp, #(1 << 6)
......
...@@ -9,9 +9,6 @@ ...@@ -9,9 +9,6 @@
*/ */
#include <mach/iop32x.h> #include <mach/iop32x.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c15, c1, 0 mrc p15, 0, \tmp, c15, c1, 0
orr \tmp, \tmp, #(1 << 6) orr \tmp, \tmp, #(1 << 6)
......
...@@ -9,9 +9,6 @@ ...@@ -9,9 +9,6 @@
*/ */
#include <mach/iop33x.h> #include <mach/iop33x.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c15, c1, 0 mrc p15, 0, \tmp, c15, c1, 0
orr \tmp, \tmp, #(1 << 6) orr \tmp, \tmp, #(1 << 6)
......
...@@ -9,15 +9,9 @@ ...@@ -9,15 +9,9 @@
*/ */
#include <mach/irqs.h> #include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqnr, #0x0 @clear out irqnr as default mov \irqnr, #0x0 @clear out irqnr as default
......
...@@ -2,15 +2,9 @@ ...@@ -2,15 +2,9 @@
* arch/arm/mach-ixp23xx/include/mach/entry-macro.S * arch/arm/mach-ixp23xx/include/mach/entry-macro.S
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
ldr \irqnr, [\irqnr] @ get interrupt number ldr \irqnr, [\irqnr] @ get interrupt number
......
...@@ -9,15 +9,9 @@ ...@@ -9,15 +9,9 @@
*/ */
#include <mach/hardware.h> #include <mach/hardware.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
ldr \irqstat, [\irqstat] @ get interrupts ldr \irqstat, [\irqstat] @ get interrupts
......
...@@ -10,12 +10,6 @@ ...@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE ldr \base, =IRQ_VIRT_BASE
.endm .endm
......
...@@ -14,16 +14,10 @@ ...@@ -14,16 +14,10 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/regs-irq.h> #include <mach/regs-irq.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register
......
...@@ -21,16 +21,10 @@ ...@@ -21,16 +21,10 @@
#define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE)
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/* /*
* Return IRQ number in irqnr. Also return processor Z flag status in CPSR * Return IRQ number in irqnr. Also return processor Z flag status in CPSR
* as set if an interrupt is pending. * as set if an interrupt is pending.
......
...@@ -8,12 +8,6 @@ ...@@ -8,12 +8,6 @@
#include <mach/regs-icu.h> #include <mach/regs-icu.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c0, c0, 0 @ CPUID mrc p15, 0, \tmp, c0, c0, 0 @ CPUID
and \tmp, \tmp, #0xff00 and \tmp, \tmp, #0xff00
......
...@@ -16,12 +16,6 @@ ...@@ -16,12 +16,6 @@
* *
*/ */
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
#if !defined(CONFIG_ARM_GIC) #if !defined(CONFIG_ARM_GIC)
#include <mach/msm_iomap.h> #include <mach/msm_iomap.h>
......
...@@ -10,12 +10,6 @@ ...@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE ldr \base, =IRQ_VIRT_BASE
.endm .endm
......
...@@ -23,9 +23,6 @@ ...@@ -23,9 +23,6 @@
#define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR)
#define HW_ICOLL_STAT_OFFSET 0x70 #define HW_ICOLL_STAT_OFFSET 0x70
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET]
cmp \irqnr, #0x7F cmp \irqnr, #0x7F
...@@ -36,6 +33,3 @@ ...@@ -36,6 +33,3 @@
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =MXS_ICOLL_VBASE ldr \base, =MXS_ICOLL_VBASE
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-netx/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for Hilscher netX based platforms
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* Low-level IRQ helper macros for Nomadik platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -14,15 +14,9 @@ ...@@ -14,15 +14,9 @@
#include <mach/irqs.h> #include <mach/irqs.h>
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
......
/*
* arch/arm/plat-omap/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for OMAP-based platforms
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -10,12 +10,6 @@ ...@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =MAIN_IRQ_CAUSE ldr \base, =MAIN_IRQ_CAUSE
.endm .endm
......
/*
* entry-macro.S
*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* Low-level IRQ helper macros for picoXcell platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -25,15 +25,9 @@ ...@@ -25,15 +25,9 @@
#define SIC1_BASE_INT 32 #define SIC1_BASE_INT 32
#define SIC2_BASE_INT 64 #define SIC2_BASE_INT 64
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
/* decode the MIC interrupt numbers */ /* decode the MIC interrupt numbers */
ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE)
......
...@@ -20,10 +20,3 @@ ...@@ -20,10 +20,3 @@
cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f
movges \irqnr, #0 movges \irqnr, #0
.endm .endm
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-pxa/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for PXA-based platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-realview/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for RealView platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -10,7 +10,3 @@ ...@@ -10,7 +10,3 @@
orr \base, \base, #ioc_base_low orr \base, \base, #ioc_base_low
.endif .endif
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -25,9 +25,6 @@ ...@@ -25,9 +25,6 @@
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \base, #S3C24XX_VA_IRQ mov \base, #S3C24XX_VA_IRQ
...@@ -71,8 +68,3 @@ ...@@ -71,8 +68,3 @@
@@ exit here, Z flag unset if IRQ @@ exit here, Z flag unset if IRQ
.endm .endm
/* currently don't need an disable_fiq macro */
.macro disable_fiq
.endm
/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* Low-level IRQ helper macros for the Samsung S3C64XX series
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
*
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Low-level IRQ helper macros for the Samsung S5P64X0
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -12,14 +12,8 @@ ...@@ -12,14 +12,8 @@
* warranty of any kind, whether express or implied. * warranty of any kind, whether express or implied.
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
.endm .endm
/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* Low-level IRQ helper macros for the Samsung S5PV210
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -8,17 +8,11 @@ ...@@ -8,17 +8,11 @@
* warranty of any kind, whether express or implied. * warranty of any kind, whether express or implied.
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mov \base, #0xfa000000 @ ICIP = 0xfa050000 mov \base, #0xfa000000 @ ICIP = 0xfa050000
add \base, \base, #0x00050000 add \base, \base, #0x00050000
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, [\base] @ get irqs ldr \irqstat, [\base] @ get irqs
ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004
......
...@@ -7,16 +7,10 @@ ...@@ -7,16 +7,10 @@
* License version 2. This program is licensed "as is" without any * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied. * warranty of any kind, whether express or implied.
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mov \base, #0xe0000000 mov \base, #0xe0000000
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqstat, #0x0C mov \irqstat, #0x0C
......
/*
* Copyright (C) 2010 Paul Mundt
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-spear3xx/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for SPEAr3xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Viresh Kumar<viresh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-spear6xx/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for SPEAr6xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Rajeev Kumar<rajeev-dlh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/* arch/arm/mach-tegra/include/mach/entry-macro.S
*
* Copyright (C) 2009 Palm, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
*
* arch-arm/mach-u300/include/mach/entry-macro.S
*
*
* Copyright (C) 2006-2009 ST-Ericsson AB
* License terms: GNU General Public License (GPL) version 2
* Low-level IRQ helper macros for ST-Ericsson U300
* Author: Linus Walleij <linus.walleij@stericsson.com>
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* Low-level IRQ helper macros for U8500 platforms
*
* Copyright (C) 2009 ST-Ericsson.
*
* This file is a copy of ARM Realview platform.
* -just satisfied checkpatch script.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-versatile/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for Versatile platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
...@@ -8,18 +8,12 @@ ...@@ -8,18 +8,12 @@
* warranty of any kind, whether express or implied. * warranty of any kind, whether express or implied.
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
@ physical 0xd8140000 is virtual 0xf8140000 @ physical 0xd8140000 is virtual 0xf8140000
mov \base, #0xf8000000 mov \base, #0xf8000000
orr \base, \base, #0x00140000 orr \base, \base, #0x00140000
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base] ldr \irqnr, [\base]
cmp \irqnr, #63 @ may be false positive, check interrupt status cmp \irqnr, #63 @ may be false positive, check interrupt status
......
...@@ -15,9 +15,6 @@ ...@@ -15,9 +15,6 @@
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \base, #AIC_BA mov \base, #AIC_BA
...@@ -27,8 +24,3 @@ ...@@ -27,8 +24,3 @@
cmp \irqnr, #0 cmp \irqnr, #0
.endm .endm
/* currently don't need an disable_fiq macro */
.macro disable_fiq
.endm
/*
* arch/arm/mach-zynq/include/mach/entry-macro.S
*
* Low-level IRQ helper macros
*
* Copyright (C) 2011 Xilinx
*
* based on arch/plat-mxc/include/mach/entry-macro.S
*
* Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
* Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
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