Commit 23139076 authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://gkernel.bkbits.net/net-drivers-2.6

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 2d7f7aaf 3af5b745
...@@ -1979,6 +1979,15 @@ config R8169_NAPI ...@@ -1979,6 +1979,15 @@ config R8169_NAPI
If in doubt, say N. If in doubt, say N.
config R8169_VLAN
bool "VLAN support"
depends on R8169 && VLAN_8021Q
---help---
Say Y here for the r8169 driver to support the functions required
by the kernel 802.1Q code.
If in doubt, say Y.
config SK98LIN config SK98LIN
tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support" tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support"
depends on PCI depends on PCI
...@@ -2191,6 +2200,17 @@ config S2IO_NAPI ...@@ -2191,6 +2200,17 @@ config S2IO_NAPI
If in doubt, say N. If in doubt, say N.
config 2BUFF_MODE
bool "Use 2 Buffer Mode on Rx side."
depends on S2IO
---help---
On enabling the 2 buffer mode, the received frame will be
split into 2 parts before being DMA'ed to the hosts memory.
The parts are the ethernet header and ethernet payload.
This is useful on systems where DMA'ing to to unaligned
physical memory loactions comes with a heavy price.
If not sure please say N.
endmenu endmenu
source "drivers/net/tokenring/Kconfig" source "drivers/net/tokenring/Kconfig"
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...@@ -289,6 +289,8 @@ typedef struct _XENA_dev_config { ...@@ -289,6 +289,8 @@ typedef struct _XENA_dev_config {
u64 tda_err_alarm; u64 tda_err_alarm;
u64 pcc_err_reg; u64 pcc_err_reg;
#define PCC_FB_ECC_DB_ERR vBIT(0xFF, 16, 8)
u64 pcc_err_mask; u64 pcc_err_mask;
u64 pcc_err_alarm; u64 pcc_err_alarm;
...@@ -512,6 +514,7 @@ typedef struct _XENA_dev_config { ...@@ -512,6 +514,7 @@ typedef struct _XENA_dev_config {
#define RX_PA_CFG_IGNORE_FRM_ERR BIT(1) #define RX_PA_CFG_IGNORE_FRM_ERR BIT(1)
#define RX_PA_CFG_IGNORE_SNAP_OUI BIT(2) #define RX_PA_CFG_IGNORE_SNAP_OUI BIT(2)
#define RX_PA_CFG_IGNORE_LLC_CTRL BIT(3) #define RX_PA_CFG_IGNORE_LLC_CTRL BIT(3)
#define RX_PA_CFG_IGNORE_L2_ERR BIT(6)
u8 unused12[0x700 - 0x1D8]; u8 unused12[0x700 - 0x1D8];
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