Commit 25ea8ecf authored by Daniel Vetter's avatar Daniel Vetter

Merge tag 'drm-msm-fixes-2021-01-07' of https://gitlab.freedesktop.org/drm/msm into drm-fixes

A few misc fixes from Rob, mostly fallout from the locking rework that
landed in the merge window, plus a few smaller things.
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGtWMhzyD6kejmViZeZ+zfJxRvfq-R2t_zA+DcDiTxsYRQ@mail.gmail.com
parents 4e181ded 00fd44a1
...@@ -534,9 +534,11 @@ struct msm_gpu *a2xx_gpu_init(struct drm_device *dev) ...@@ -534,9 +534,11 @@ struct msm_gpu *a2xx_gpu_init(struct drm_device *dev)
if (!gpu->aspace) { if (!gpu->aspace) {
dev_err(dev->dev, "No memory protection without MMU\n"); dev_err(dev->dev, "No memory protection without MMU\n");
if (!allow_vram_carveout) {
ret = -ENXIO; ret = -ENXIO;
goto fail; goto fail;
} }
}
return gpu; return gpu;
......
...@@ -564,9 +564,11 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) ...@@ -564,9 +564,11 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
* implement a cmdstream validator. * implement a cmdstream validator.
*/ */
DRM_DEV_ERROR(dev->dev, "No memory protection without IOMMU\n"); DRM_DEV_ERROR(dev->dev, "No memory protection without IOMMU\n");
if (!allow_vram_carveout) {
ret = -ENXIO; ret = -ENXIO;
goto fail; goto fail;
} }
}
icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem"); icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
ret = IS_ERR(icc_path); ret = IS_ERR(icc_path);
......
...@@ -692,9 +692,11 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev) ...@@ -692,9 +692,11 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
* implement a cmdstream validator. * implement a cmdstream validator.
*/ */
DRM_DEV_ERROR(dev->dev, "No memory protection without IOMMU\n"); DRM_DEV_ERROR(dev->dev, "No memory protection without IOMMU\n");
if (!allow_vram_carveout) {
ret = -ENXIO; ret = -ENXIO;
goto fail; goto fail;
} }
}
icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem"); icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
ret = IS_ERR(icc_path); ret = IS_ERR(icc_path);
......
...@@ -18,6 +18,10 @@ bool snapshot_debugbus = false; ...@@ -18,6 +18,10 @@ bool snapshot_debugbus = false;
MODULE_PARM_DESC(snapshot_debugbus, "Include debugbus sections in GPU devcoredump (if not fused off)"); MODULE_PARM_DESC(snapshot_debugbus, "Include debugbus sections in GPU devcoredump (if not fused off)");
module_param_named(snapshot_debugbus, snapshot_debugbus, bool, 0600); module_param_named(snapshot_debugbus, snapshot_debugbus, bool, 0600);
bool allow_vram_carveout = false;
MODULE_PARM_DESC(allow_vram_carveout, "Allow using VRAM Carveout, in place of IOMMU");
module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600);
static const struct adreno_info gpulist[] = { static const struct adreno_info gpulist[] = {
{ {
.rev = ADRENO_REV(2, 0, 0, 0), .rev = ADRENO_REV(2, 0, 0, 0),
......
...@@ -191,8 +191,6 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, ...@@ -191,8 +191,6 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu,
struct platform_device *pdev) struct platform_device *pdev)
{ {
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
struct io_pgtable_domain_attr pgtbl_cfg;
struct iommu_domain *iommu; struct iommu_domain *iommu;
struct msm_mmu *mmu; struct msm_mmu *mmu;
struct msm_gem_address_space *aspace; struct msm_gem_address_space *aspace;
...@@ -202,6 +200,10 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, ...@@ -202,6 +200,10 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu,
if (!iommu) if (!iommu)
return NULL; return NULL;
if (adreno_is_a6xx(adreno_gpu)) {
struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
struct io_pgtable_domain_attr pgtbl_cfg;
/* /*
* This allows GPU to set the bus attributes required to use system * This allows GPU to set the bus attributes required to use system
* cache on behalf of the iommu page table walker. * cache on behalf of the iommu page table walker.
...@@ -210,6 +212,7 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, ...@@ -210,6 +212,7 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu,
pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_ARM_OUTER_WBWA; pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_ARM_OUTER_WBWA;
iommu_domain_set_attr(iommu, DOMAIN_ATTR_IO_PGTABLE_CFG, &pgtbl_cfg); iommu_domain_set_attr(iommu, DOMAIN_ATTR_IO_PGTABLE_CFG, &pgtbl_cfg);
} }
}
mmu = msm_iommu_new(&pdev->dev, iommu); mmu = msm_iommu_new(&pdev->dev, iommu);
if (IS_ERR(mmu)) { if (IS_ERR(mmu)) {
......
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include "adreno_pm4.xml.h" #include "adreno_pm4.xml.h"
extern bool snapshot_debugbus; extern bool snapshot_debugbus;
extern bool allow_vram_carveout;
enum { enum {
ADRENO_FW_PM4 = 0, ADRENO_FW_PM4 = 0,
...@@ -211,6 +212,11 @@ static inline int adreno_is_a540(struct adreno_gpu *gpu) ...@@ -211,6 +212,11 @@ static inline int adreno_is_a540(struct adreno_gpu *gpu)
return gpu->revn == 540; return gpu->revn == 540;
} }
static inline bool adreno_is_a6xx(struct adreno_gpu *gpu)
{
return ((gpu->revn < 700 && gpu->revn > 599));
}
static inline int adreno_is_a618(struct adreno_gpu *gpu) static inline int adreno_is_a618(struct adreno_gpu *gpu)
{ {
return gpu->revn == 618; return gpu->revn == 618;
......
...@@ -693,6 +693,13 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data) ...@@ -693,6 +693,13 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
return 0; return 0;
} }
if (state == ST_CONNECT_PENDING) {
/* wait until ST_CONNECTED */
dp_add_event(dp, EV_IRQ_HPD_INT, 0, 1); /* delay = 1 */
mutex_unlock(&dp->event_mutex);
return 0;
}
ret = dp_display_usbpd_attention_cb(&dp->pdev->dev); ret = dp_display_usbpd_attention_cb(&dp->pdev->dev);
if (ret == -ECONNRESET) { /* cable unplugged */ if (ret == -ECONNRESET) { /* cable unplugged */
dp->core_initialized = false; dp->core_initialized = false;
......
...@@ -167,12 +167,18 @@ int dp_panel_read_sink_caps(struct dp_panel *dp_panel, ...@@ -167,12 +167,18 @@ int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
panel = container_of(dp_panel, struct dp_panel_private, dp_panel); panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
rc = dp_panel_read_dpcd(dp_panel); rc = dp_panel_read_dpcd(dp_panel);
if (rc) {
DRM_ERROR("read dpcd failed %d\n", rc);
return rc;
}
bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate); bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate);
if (rc || !is_link_rate_valid(bw_code) || if (!is_link_rate_valid(bw_code) ||
!is_lane_count_valid(dp_panel->link_info.num_lanes) || !is_lane_count_valid(dp_panel->link_info.num_lanes) ||
(bw_code > dp_panel->max_bw_code)) { (bw_code > dp_panel->max_bw_code)) {
DRM_ERROR("read dpcd failed %d\n", rc); DRM_ERROR("Illegal link rate=%d lane=%d\n", dp_panel->link_info.rate,
return rc; dp_panel->link_info.num_lanes);
return -EINVAL;
} }
if (dp_panel->dfp_present) { if (dp_panel->dfp_present) {
......
...@@ -457,14 +457,14 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv) ...@@ -457,14 +457,14 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv)
drm_mode_config_init(ddev); drm_mode_config_init(ddev);
/* Bind all our sub-components: */ ret = msm_init_vram(ddev);
ret = component_bind_all(dev, ddev);
if (ret) if (ret)
goto err_destroy_mdss; goto err_destroy_mdss;
ret = msm_init_vram(ddev); /* Bind all our sub-components: */
ret = component_bind_all(dev, ddev);
if (ret) if (ret)
goto err_msm_uninit; goto err_destroy_mdss;
dma_set_max_seg_size(dev, UINT_MAX); dma_set_max_seg_size(dev, UINT_MAX);
......
...@@ -96,6 +96,8 @@ static struct page **get_pages(struct drm_gem_object *obj) ...@@ -96,6 +96,8 @@ static struct page **get_pages(struct drm_gem_object *obj)
{ {
struct msm_gem_object *msm_obj = to_msm_bo(obj); struct msm_gem_object *msm_obj = to_msm_bo(obj);
WARN_ON(!msm_gem_is_locked(obj));
if (!msm_obj->pages) { if (!msm_obj->pages) {
struct drm_device *dev = obj->dev; struct drm_device *dev = obj->dev;
struct page **p; struct page **p;
...@@ -988,6 +990,8 @@ void msm_gem_free_object(struct drm_gem_object *obj) ...@@ -988,6 +990,8 @@ void msm_gem_free_object(struct drm_gem_object *obj)
if (msm_obj->pages) if (msm_obj->pages)
kvfree(msm_obj->pages); kvfree(msm_obj->pages);
put_iova_vmas(obj);
/* dma_buf_detach() grabs resv lock, so we need to unlock /* dma_buf_detach() grabs resv lock, so we need to unlock
* prior to drm_prime_gem_destroy * prior to drm_prime_gem_destroy
*/ */
...@@ -997,11 +1001,10 @@ void msm_gem_free_object(struct drm_gem_object *obj) ...@@ -997,11 +1001,10 @@ void msm_gem_free_object(struct drm_gem_object *obj)
} else { } else {
msm_gem_vunmap(obj); msm_gem_vunmap(obj);
put_pages(obj); put_pages(obj);
put_iova_vmas(obj);
msm_gem_unlock(obj); msm_gem_unlock(obj);
} }
put_iova_vmas(obj);
drm_gem_object_release(obj); drm_gem_object_release(obj);
kfree(msm_obj); kfree(msm_obj);
...@@ -1115,6 +1118,8 @@ static struct drm_gem_object *_msm_gem_new(struct drm_device *dev, ...@@ -1115,6 +1118,8 @@ static struct drm_gem_object *_msm_gem_new(struct drm_device *dev,
struct msm_gem_vma *vma; struct msm_gem_vma *vma;
struct page **pages; struct page **pages;
drm_gem_private_object_init(dev, obj, size);
msm_gem_lock(obj); msm_gem_lock(obj);
vma = add_vma(obj, NULL); vma = add_vma(obj, NULL);
...@@ -1126,9 +1131,9 @@ static struct drm_gem_object *_msm_gem_new(struct drm_device *dev, ...@@ -1126,9 +1131,9 @@ static struct drm_gem_object *_msm_gem_new(struct drm_device *dev,
to_msm_bo(obj)->vram_node = &vma->node; to_msm_bo(obj)->vram_node = &vma->node;
drm_gem_private_object_init(dev, obj, size); msm_gem_lock(obj);
pages = get_pages(obj); pages = get_pages(obj);
msm_gem_unlock(obj);
if (IS_ERR(pages)) { if (IS_ERR(pages)) {
ret = PTR_ERR(pages); ret = PTR_ERR(pages);
goto fail; goto fail;
......
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