Commit 32195aec authored by Jiang Liu's avatar Jiang Liu Committed by Bjorn Helgaas

drm/radeon: Use PCI Express Capability accessors

Use PCI Express Capability access functions to simplify radeon driver.
Signed-off-by: default avatarJiang Liu <jiang.liu@huawei.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5548bfd0
...@@ -77,13 +77,9 @@ void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, ...@@ -77,13 +77,9 @@ void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw,
void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
{ {
u16 ctl, v; u16 ctl, v;
int cap, err; int err;
cap = pci_pcie_cap(rdev->pdev); err = pcie_capability_read_word(rdev->pdev, PCI_EXP_DEVCTL, &ctl);
if (!cap)
return;
err = pci_read_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, &ctl);
if (err) if (err)
return; return;
...@@ -95,7 +91,7 @@ void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) ...@@ -95,7 +91,7 @@ void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
if ((v == 0) || (v == 6) || (v == 7)) { if ((v == 0) || (v == 6) || (v == 7)) {
ctl &= ~PCI_EXP_DEVCTL_READRQ; ctl &= ~PCI_EXP_DEVCTL_READRQ;
ctl |= (2 << 12); ctl |= (2 << 12);
pci_write_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, ctl); pcie_capability_write_word(rdev->pdev, PCI_EXP_DEVCTL, ctl);
} }
} }
......
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