Commit 329bd56c authored by Vipin Sharma's avatar Vipin Sharma Committed by Paolo Bonzini

KVM: VMX: Add a helper function to retrieve the GPR index for INVPCID, INVVPID, and INVEPT

handle_invept(), handle_invvpid(), handle_invpcid() read the same reg2
field in vmcs.VMX_INSTRUCTION_INFO to get the index of the GPR that
holds the invalidation type. Add a helper to retrieve reg2 from VMX
instruction info to consolidate and document the shift+mask magic.
Signed-off-by: default avatarVipin Sharma <vipinsh@google.com>
Reviewed-by: default avatarSean Christopherson <seanjc@google.com>
Message-Id: <20211109174426.2350547-2-vipinsh@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent a5e0c252
...@@ -5343,7 +5343,7 @@ static int handle_invept(struct kvm_vcpu *vcpu) ...@@ -5343,7 +5343,7 @@ static int handle_invept(struct kvm_vcpu *vcpu)
struct { struct {
u64 eptp, gpa; u64 eptp, gpa;
} operand; } operand;
int i, r; int i, r, gpr_index;
if (!(vmx->nested.msrs.secondary_ctls_high & if (!(vmx->nested.msrs.secondary_ctls_high &
SECONDARY_EXEC_ENABLE_EPT) || SECONDARY_EXEC_ENABLE_EPT) ||
...@@ -5356,7 +5356,8 @@ static int handle_invept(struct kvm_vcpu *vcpu) ...@@ -5356,7 +5356,8 @@ static int handle_invept(struct kvm_vcpu *vcpu)
return 1; return 1;
vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO); vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
type = kvm_register_read(vcpu, (vmx_instruction_info >> 28) & 0xf); gpr_index = vmx_get_instr_info_reg2(vmx_instruction_info);
type = kvm_register_read(vcpu, gpr_index);
types = (vmx->nested.msrs.ept_caps >> VMX_EPT_EXTENT_SHIFT) & 6; types = (vmx->nested.msrs.ept_caps >> VMX_EPT_EXTENT_SHIFT) & 6;
...@@ -5423,7 +5424,7 @@ static int handle_invvpid(struct kvm_vcpu *vcpu) ...@@ -5423,7 +5424,7 @@ static int handle_invvpid(struct kvm_vcpu *vcpu)
u64 gla; u64 gla;
} operand; } operand;
u16 vpid02; u16 vpid02;
int r; int r, gpr_index;
if (!(vmx->nested.msrs.secondary_ctls_high & if (!(vmx->nested.msrs.secondary_ctls_high &
SECONDARY_EXEC_ENABLE_VPID) || SECONDARY_EXEC_ENABLE_VPID) ||
...@@ -5436,7 +5437,8 @@ static int handle_invvpid(struct kvm_vcpu *vcpu) ...@@ -5436,7 +5437,8 @@ static int handle_invvpid(struct kvm_vcpu *vcpu)
return 1; return 1;
vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO); vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
type = kvm_register_read(vcpu, (vmx_instruction_info >> 28) & 0xf); gpr_index = vmx_get_instr_info_reg2(vmx_instruction_info);
type = kvm_register_read(vcpu, gpr_index);
types = (vmx->nested.msrs.vpid_caps & types = (vmx->nested.msrs.vpid_caps &
VMX_VPID_EXTENT_SUPPORTED_MASK) >> 8; VMX_VPID_EXTENT_SUPPORTED_MASK) >> 8;
......
...@@ -5443,6 +5443,7 @@ static int handle_invpcid(struct kvm_vcpu *vcpu) ...@@ -5443,6 +5443,7 @@ static int handle_invpcid(struct kvm_vcpu *vcpu)
u64 pcid; u64 pcid;
u64 gla; u64 gla;
} operand; } operand;
int gpr_index;
if (!guest_cpuid_has(vcpu, X86_FEATURE_INVPCID)) { if (!guest_cpuid_has(vcpu, X86_FEATURE_INVPCID)) {
kvm_queue_exception(vcpu, UD_VECTOR); kvm_queue_exception(vcpu, UD_VECTOR);
...@@ -5450,7 +5451,8 @@ static int handle_invpcid(struct kvm_vcpu *vcpu) ...@@ -5450,7 +5451,8 @@ static int handle_invpcid(struct kvm_vcpu *vcpu)
} }
vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO); vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
type = kvm_register_read(vcpu, (vmx_instruction_info >> 28) & 0xf); gpr_index = vmx_get_instr_info_reg2(vmx_instruction_info);
type = kvm_register_read(vcpu, gpr_index);
if (type > 3) { if (type > 3) {
kvm_inject_gp(vcpu, 0); kvm_inject_gp(vcpu, 0);
......
...@@ -550,4 +550,9 @@ static inline bool vmx_guest_state_valid(struct kvm_vcpu *vcpu) ...@@ -550,4 +550,9 @@ static inline bool vmx_guest_state_valid(struct kvm_vcpu *vcpu)
void dump_vmcs(struct kvm_vcpu *vcpu); void dump_vmcs(struct kvm_vcpu *vcpu);
static inline int vmx_get_instr_info_reg2(u32 vmx_instr_info)
{
return (vmx_instr_info >> 28) & 0xf;
}
#endif /* __KVM_X86_VMX_H */ #endif /* __KVM_X86_VMX_H */
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