Commit 32c453f1 authored by David Zhang's avatar David Zhang Committed by Alex Deucher

drm/amd/display: add vline time in micro sec to PSR context

[why]
The current PSR SU programming margin is fixed base on FHD 60HZ
panel. If the resolution and refresh rate become higher, the time
of current margin might not cover the programming SU time.

[how]
Notice that the programming SU time is the same among different
panels.

Instead of fixing the margin with target line number, change the
margin unit to micro second which indicate the time needed for
programming SU. Then FW set the margin line number base on the
line time and margin time.
Signed-off-by: default avatarDavid Zhang <dingchen.zhang@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 65657d98
...@@ -3274,6 +3274,8 @@ bool dc_link_setup_psr(struct dc_link *link, ...@@ -3274,6 +3274,8 @@ bool dc_link_setup_psr(struct dc_link *link,
psr_config->su_granularity_required; psr_config->su_granularity_required;
psr_context->su_y_granularity = psr_context->su_y_granularity =
psr_config->su_y_granularity; psr_config->su_y_granularity;
psr_context->line_time_in_us =
psr_config->line_time_in_us;
} }
psr_context->channel = link->ddc->ddc_pin->hw_info.ddc_channel; psr_context->channel = link->ddc->ddc_pin->hw_info.ddc_channel;
......
...@@ -676,6 +676,7 @@ struct psr_config { ...@@ -676,6 +676,7 @@ struct psr_config {
bool su_granularity_required; bool su_granularity_required;
/* psr2 selective update y granularity capability */ /* psr2 selective update y granularity capability */
uint8_t su_y_granularity; uint8_t su_y_granularity;
unsigned int line_time_in_us;
}; };
union dmcu_psr_level { union dmcu_psr_level {
...@@ -783,6 +784,7 @@ struct psr_context { ...@@ -783,6 +784,7 @@ struct psr_context {
bool su_granularity_required; bool su_granularity_required;
/* psr2 selective update y granularity capability */ /* psr2 selective update y granularity capability */
uint8_t su_y_granularity; uint8_t su_y_granularity;
unsigned int line_time_in_us;
}; };
struct colorspace_transform { struct colorspace_transform {
......
...@@ -340,6 +340,7 @@ static bool dmub_psr_copy_settings(struct dmub_psr *dmub, ...@@ -340,6 +340,7 @@ static bool dmub_psr_copy_settings(struct dmub_psr *dmub,
copy_settings_data->su_y_granularity = psr_context->su_y_granularity; copy_settings_data->su_y_granularity = psr_context->su_y_granularity;
copy_settings_data->line_capture_indication = 0; copy_settings_data->line_capture_indication = 0;
copy_settings_data->line_time_in_us = psr_context->line_time_in_us;
copy_settings_data->fec_enable_status = (link->fec_state == dc_link_fec_enabled); copy_settings_data->fec_enable_status = (link->fec_state == dc_link_fec_enabled);
copy_settings_data->fec_enable_delay_in100us = link->dc->debug.fec_enable_delay_in100us; copy_settings_data->fec_enable_delay_in100us = link->dc->debug.fec_enable_delay_in100us;
copy_settings_data->cmd_version = DMUB_CMD_PSR_CONTROL_VERSION_1; copy_settings_data->cmd_version = DMUB_CMD_PSR_CONTROL_VERSION_1;
......
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