Commit 383f6024 authored by Biju Das's avatar Biju Das Committed by Simon Horman

ARM: dts: r8a7743: Fix sorting of rwdt node

Watchdog node is incorrectly placed on r8a7743 SoC dtsi. This patch fixes
the sorting order.

Fixes: b5beb5d4 ("ARM: dts: r8a7743: Add watchdog support to SoC dtsi")
Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent aeefe739
...@@ -135,6 +135,16 @@ soc { ...@@ -135,6 +135,16 @@ soc {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
rwdt: watchdog@e6020000 {
compatible = "renesas,r8a7743-wdt",
"renesas,rcar-gen2-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 402>;
status = "disabled";
};
gpio0: gpio@e6050000 { gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7743", compatible = "renesas,gpio-r8a7743",
"renesas,rcar-gen2-gpio"; "renesas,rcar-gen2-gpio";
...@@ -291,16 +301,6 @@ rst: reset-controller@e6160000 { ...@@ -291,16 +301,6 @@ rst: reset-controller@e6160000 {
reg = <0 0xe6160000 0 0x100>; reg = <0 0xe6160000 0 0x100>;
}; };
rwdt: watchdog@e6020000 {
compatible = "renesas,r8a7743-wdt",
"renesas,rcar-gen2-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 402>;
status = "disabled";
};
sysc: system-controller@e6180000 { sysc: system-controller@e6180000 {
compatible = "renesas,r8a7743-sysc"; compatible = "renesas,r8a7743-sysc";
reg = <0 0xe6180000 0 0x200>; reg = <0 0xe6180000 0 0x200>;
......
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