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Commit 3ca90171 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
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clk: qcom: camcc-sc7180: use ARRAY_SIZE instead of specifying num_parents 

Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211228045415.20543-5-dmitry.baryshkov@linaro.org
parent ba9b57dc
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Showing with 25 additions and 25 deletions
drivers/clk/qcom/camcc-sc7180.c
View file @ 3ca90171
...@@ -303,7 +303,7 @@ static struct clk_rcg2 cam_cc_bps_clk_src = { ...@@ -303,7 +303,7 @@ static struct clk_rcg2 cam_cc_bps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_bps_clk_src", .name = "cam_cc_bps_clk_src",
.parent_data = cam_cc_parent_data_2, .parent_data = cam_cc_parent_data_2,
.num_parents = 5, .num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -324,7 +324,7 @@ static struct clk_rcg2 cam_cc_cci_0_clk_src = { ...@@ -324,7 +324,7 @@ static struct clk_rcg2 cam_cc_cci_0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_cci_0_clk_src", .name = "cam_cc_cci_0_clk_src",
.parent_data = cam_cc_parent_data_5, .parent_data = cam_cc_parent_data_5,
.num_parents = 3, .num_parents = ARRAY_SIZE(cam_cc_parent_data_5),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -338,7 +338,7 @@ static struct clk_rcg2 cam_cc_cci_1_clk_src = { ...@@ -338,7 +338,7 @@ static struct clk_rcg2 cam_cc_cci_1_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_cci_1_clk_src", .name = "cam_cc_cci_1_clk_src",
.parent_data = cam_cc_parent_data_5, .parent_data = cam_cc_parent_data_5,
.num_parents = 3, .num_parents = ARRAY_SIZE(cam_cc_parent_data_5),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -359,7 +359,7 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = { ...@@ -359,7 +359,7 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_cphy_rx_clk_src", .name = "cam_cc_cphy_rx_clk_src",
.parent_data = cam_cc_parent_data_3, .parent_data = cam_cc_parent_data_3,
.num_parents = 6, .num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -378,7 +378,7 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = { ...@@ -378,7 +378,7 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_csi0phytimer_clk_src", .name = "cam_cc_csi0phytimer_clk_src",
.parent_data = cam_cc_parent_data_0, .parent_data = cam_cc_parent_data_0,
.num_parents = 4, .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -392,7 +392,7 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = { ...@@ -392,7 +392,7 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_csi1phytimer_clk_src", .name = "cam_cc_csi1phytimer_clk_src",
.parent_data = cam_cc_parent_data_0, .parent_data = cam_cc_parent_data_0,
.num_parents = 4, .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -406,7 +406,7 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = { ...@@ -406,7 +406,7 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_csi2phytimer_clk_src", .name = "cam_cc_csi2phytimer_clk_src",
.parent_data = cam_cc_parent_data_0, .parent_data = cam_cc_parent_data_0,
.num_parents = 4, .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -420,7 +420,7 @@ static struct clk_rcg2 cam_cc_csi3phytimer_clk_src = { ...@@ -420,7 +420,7 @@ static struct clk_rcg2 cam_cc_csi3phytimer_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_csi3phytimer_clk_src", .name = "cam_cc_csi3phytimer_clk_src",
.parent_data = cam_cc_parent_data_0, .parent_data = cam_cc_parent_data_0,
.num_parents = 4, .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -442,7 +442,7 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = { ...@@ -442,7 +442,7 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_fast_ahb_clk_src", .name = "cam_cc_fast_ahb_clk_src",
.parent_data = cam_cc_parent_data_0, .parent_data = cam_cc_parent_data_0,
.num_parents = 4, .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -465,7 +465,7 @@ static struct clk_rcg2 cam_cc_icp_clk_src = { ...@@ -465,7 +465,7 @@ static struct clk_rcg2 cam_cc_icp_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_icp_clk_src", .name = "cam_cc_icp_clk_src",
.parent_data = cam_cc_parent_data_2, .parent_data = cam_cc_parent_data_2,
.num_parents = 5, .num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -487,7 +487,7 @@ static struct clk_rcg2 cam_cc_ife_0_clk_src = { ...@@ -487,7 +487,7 @@ static struct clk_rcg2 cam_cc_ife_0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_0_clk_src", .name = "cam_cc_ife_0_clk_src",
.parent_data = cam_cc_parent_data_4, .parent_data = cam_cc_parent_data_4,
.num_parents = 4, .num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -509,7 +509,7 @@ static struct clk_rcg2 cam_cc_ife_0_csid_clk_src = { ...@@ -509,7 +509,7 @@ static struct clk_rcg2 cam_cc_ife_0_csid_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_0_csid_clk_src", .name = "cam_cc_ife_0_csid_clk_src",
.parent_data = cam_cc_parent_data_3, .parent_data = cam_cc_parent_data_3,
.num_parents = 6, .num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -523,7 +523,7 @@ static struct clk_rcg2 cam_cc_ife_1_clk_src = { ...@@ -523,7 +523,7 @@ static struct clk_rcg2 cam_cc_ife_1_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_1_clk_src", .name = "cam_cc_ife_1_clk_src",
.parent_data = cam_cc_parent_data_4, .parent_data = cam_cc_parent_data_4,
.num_parents = 4, .num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -537,7 +537,7 @@ static struct clk_rcg2 cam_cc_ife_1_csid_clk_src = { ...@@ -537,7 +537,7 @@ static struct clk_rcg2 cam_cc_ife_1_csid_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_1_csid_clk_src", .name = "cam_cc_ife_1_csid_clk_src",
.parent_data = cam_cc_parent_data_3, .parent_data = cam_cc_parent_data_3,
.num_parents = 6, .num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -551,7 +551,7 @@ static struct clk_rcg2 cam_cc_ife_lite_clk_src = { ...@@ -551,7 +551,7 @@ static struct clk_rcg2 cam_cc_ife_lite_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_lite_clk_src", .name = "cam_cc_ife_lite_clk_src",
.parent_data = cam_cc_parent_data_4, .parent_data = cam_cc_parent_data_4,
.num_parents = 4, .num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
.flags = CLK_SET_RATE_PARENT, .flags = CLK_SET_RATE_PARENT,
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
...@@ -566,7 +566,7 @@ static struct clk_rcg2 cam_cc_ife_lite_csid_clk_src = { ...@@ -566,7 +566,7 @@ static struct clk_rcg2 cam_cc_ife_lite_csid_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_lite_csid_clk_src", .name = "cam_cc_ife_lite_csid_clk_src",
.parent_data = cam_cc_parent_data_3, .parent_data = cam_cc_parent_data_3,
.num_parents = 6, .num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -589,7 +589,7 @@ static struct clk_rcg2 cam_cc_ipe_0_clk_src = { ...@@ -589,7 +589,7 @@ static struct clk_rcg2 cam_cc_ipe_0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ipe_0_clk_src", .name = "cam_cc_ipe_0_clk_src",
.parent_data = cam_cc_parent_data_2, .parent_data = cam_cc_parent_data_2,
.num_parents = 5, .num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -612,7 +612,7 @@ static struct clk_rcg2 cam_cc_jpeg_clk_src = { ...@@ -612,7 +612,7 @@ static struct clk_rcg2 cam_cc_jpeg_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_jpeg_clk_src", .name = "cam_cc_jpeg_clk_src",
.parent_data = cam_cc_parent_data_2, .parent_data = cam_cc_parent_data_2,
.num_parents = 5, .num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -634,7 +634,7 @@ static struct clk_rcg2 cam_cc_lrme_clk_src = { ...@@ -634,7 +634,7 @@ static struct clk_rcg2 cam_cc_lrme_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_lrme_clk_src", .name = "cam_cc_lrme_clk_src",
.parent_data = cam_cc_parent_data_6, .parent_data = cam_cc_parent_data_6,
.num_parents = 5, .num_parents = ARRAY_SIZE(cam_cc_parent_data_6),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -655,7 +655,7 @@ static struct clk_rcg2 cam_cc_mclk0_clk_src = { ...@@ -655,7 +655,7 @@ static struct clk_rcg2 cam_cc_mclk0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk0_clk_src", .name = "cam_cc_mclk0_clk_src",
.parent_data = cam_cc_parent_data_1, .parent_data = cam_cc_parent_data_1,
.num_parents = 3, .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -669,7 +669,7 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = { ...@@ -669,7 +669,7 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk1_clk_src", .name = "cam_cc_mclk1_clk_src",
.parent_data = cam_cc_parent_data_1, .parent_data = cam_cc_parent_data_1,
.num_parents = 3, .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -683,7 +683,7 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = { ...@@ -683,7 +683,7 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk2_clk_src", .name = "cam_cc_mclk2_clk_src",
.parent_data = cam_cc_parent_data_1, .parent_data = cam_cc_parent_data_1,
.num_parents = 3, .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -697,7 +697,7 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = { ...@@ -697,7 +697,7 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk3_clk_src", .name = "cam_cc_mclk3_clk_src",
.parent_data = cam_cc_parent_data_1, .parent_data = cam_cc_parent_data_1,
.num_parents = 3, .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -711,7 +711,7 @@ static struct clk_rcg2 cam_cc_mclk4_clk_src = { ...@@ -711,7 +711,7 @@ static struct clk_rcg2 cam_cc_mclk4_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk4_clk_src", .name = "cam_cc_mclk4_clk_src",
.parent_data = cam_cc_parent_data_1, .parent_data = cam_cc_parent_data_1,
.num_parents = 3, .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
}; };
...@@ -730,7 +730,7 @@ static struct clk_rcg2 cam_cc_slow_ahb_clk_src = { ...@@ -730,7 +730,7 @@ static struct clk_rcg2 cam_cc_slow_ahb_clk_src = {
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_slow_ahb_clk_src", .name = "cam_cc_slow_ahb_clk_src",
.parent_data = cam_cc_parent_data_0, .parent_data = cam_cc_parent_data_0,
.num_parents = 4, .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
.ops = &clk_rcg2_shared_ops, .ops = &clk_rcg2_shared_ops,
}, },
......
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