Commit 3d457727 authored by Ovidiu Bunea's avatar Ovidiu Bunea Committed by Alex Deucher

drm/amd/display: Use optc32 instead of optc30 in DC

Change DC to use optc32, which uses REG_UPDATE instead of REG_SET.
REG_SET clears OTG_H_TIMING_DIV_MODE_MANUAL which must be set to 1 in
some specific HDMI configurations.
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: default avatarCharlene Liu <charlene.liu@amd.com>
Acked-by: default avatarRodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: default avatarOvidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5710c6c0
...@@ -207,7 +207,7 @@ void optc3_set_odm_bypass(struct timing_generator *optc, ...@@ -207,7 +207,7 @@ void optc3_set_odm_bypass(struct timing_generator *optc,
); );
h_div = optc1_is_two_pixels_per_containter(dc_crtc_timing); h_div = optc1_is_two_pixels_per_containter(dc_crtc_timing);
REG_SET(OTG_H_TIMING_CNTL, 0, REG_UPDATE(OTG_H_TIMING_CNTL,
OTG_H_TIMING_DIV_MODE, h_div); OTG_H_TIMING_DIV_MODE, h_div);
REG_SET(OPTC_MEMORY_CONFIG, 0, REG_SET(OPTC_MEMORY_CONFIG, 0,
......
...@@ -201,7 +201,7 @@ static void optc32_disable_phantom_otg(struct timing_generator *optc) ...@@ -201,7 +201,7 @@ static void optc32_disable_phantom_otg(struct timing_generator *optc)
REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0); REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0);
} }
static void optc32_set_odm_bypass(struct timing_generator *optc, void optc32_set_odm_bypass(struct timing_generator *optc,
const struct dc_crtc_timing *dc_crtc_timing) const struct dc_crtc_timing *dc_crtc_timing)
{ {
struct optc *optc1 = DCN10TG_FROM_TG(optc); struct optc *optc1 = DCN10TG_FROM_TG(optc);
......
...@@ -181,5 +181,7 @@ ...@@ -181,5 +181,7 @@
void dcn32_timing_generator_init(struct optc *optc1); void dcn32_timing_generator_init(struct optc *optc1);
void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode); void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode);
void optc32_get_odm_combine_segments(struct timing_generator *tg, int *odm_combine_segments); void optc32_get_odm_combine_segments(struct timing_generator *tg, int *odm_combine_segments);
void optc32_set_odm_bypass(struct timing_generator *optc,
const struct dc_crtc_timing *dc_crtc_timing);
#endif /* __DC_OPTC_DCN32_H__ */ #endif /* __DC_OPTC_DCN32_H__ */
...@@ -249,7 +249,7 @@ static struct timing_generator_funcs dcn35_tg_funcs = { ...@@ -249,7 +249,7 @@ static struct timing_generator_funcs dcn35_tg_funcs = {
.set_dsc_config = optc3_set_dsc_config, .set_dsc_config = optc3_set_dsc_config,
.get_dsc_status = optc2_get_dsc_status, .get_dsc_status = optc2_get_dsc_status,
.set_dwb_source = NULL, .set_dwb_source = NULL,
.set_odm_bypass = optc3_set_odm_bypass, .set_odm_bypass = optc32_set_odm_bypass,
.set_odm_combine = optc35_set_odm_combine, .set_odm_combine = optc35_set_odm_combine,
.get_optc_source = optc2_get_optc_source, .get_optc_source = optc2_get_optc_source,
.set_h_timing_div_manual_mode = optc32_set_h_timing_div_manual_mode, .set_h_timing_div_manual_mode = optc32_set_h_timing_div_manual_mode,
......
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