Commit 4194dabe authored by Mark Brown's avatar Mark Brown

spi: amlogic: meson-spicc: Use pinctrl to drive CLK line when idle

Merge series from Amjad Ouled-Ameur <aouledameur@baylibre.com>:

Between SPI transactions, all SPI pins are in HiZ state. When using the SS
signal from the SPICC controller it's not an issue because when the
transaction resumes all pins come back to the right state at the same time
as SS.

The problem is when we use CS as a GPIO. In fact, between the GPIO CS
state change and SPI pins state change from idle, you can have a missing or
spurious clock transition.

Set a bias on the clock depending on the clock polarity requested before CS
goes active, by passing a special "idle-low" and "idle-high" pinctrl state
and setting the right state at a start of a message.
parents b872e8b1 f4567b28
......@@ -10,9 +10,6 @@ title: Amlogic Meson SPI Communication Controller
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
allOf:
- $ref: "spi-controller.yaml#"
description: |
The Meson SPICC is a generic SPI controller for general purpose Full-Duplex
communications with dedicated 16 words RX/TX PIO FIFOs.
......@@ -43,14 +40,16 @@ properties:
minItems: 1
maxItems: 2
if:
allOf:
- $ref: "spi-controller.yaml#"
- if:
properties:
compatible:
contains:
enum:
- amlogic,meson-g12a-spicc
then:
then:
properties:
clocks:
minItems: 2
......@@ -60,7 +59,7 @@ then:
- const: core
- const: pclk
else:
else:
properties:
clocks:
maxItems: 1
......@@ -69,6 +68,26 @@ else:
items:
- const: core
- if:
properties:
compatible:
contains:
enum:
- amlogic,meson-gx-spicc
then:
properties:
pinctrl-0: true
pinctrl-1: true
pinctrl-2: true
pinctrl-names:
minItems: 1
items:
- const: default
- const: idle-high
- const: idle-low
required:
- compatible
- reg
......
......@@ -21,6 +21,7 @@
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/reset.h>
#include <linux/pinctrl/consumer.h>
/*
* The Meson SPICC controller could support DMA based transfers, but is not
......@@ -167,6 +168,9 @@ struct meson_spicc_device {
unsigned long tx_remain;
unsigned long rx_remain;
unsigned long xfer_remain;
struct pinctrl *pinctrl;
struct pinctrl_state *pins_idle_high;
struct pinctrl_state *pins_idle_low;
};
#define pow2_clk_to_spicc(_div) container_of(_div, struct meson_spicc_device, pow2_div)
......@@ -175,8 +179,22 @@ static void meson_spicc_oen_enable(struct meson_spicc_device *spicc)
{
u32 conf;
if (!spicc->data->has_oen)
if (!spicc->data->has_oen) {
/* Try to get pinctrl states for idle high/low */
spicc->pins_idle_high = pinctrl_lookup_state(spicc->pinctrl,
"idle-high");
if (IS_ERR(spicc->pins_idle_high)) {
dev_warn(&spicc->pdev->dev, "can't get idle-high pinctrl\n");
spicc->pins_idle_high = NULL;
}
spicc->pins_idle_low = pinctrl_lookup_state(spicc->pinctrl,
"idle-low");
if (IS_ERR(spicc->pins_idle_low)) {
dev_warn(&spicc->pdev->dev, "can't get idle-low pinctrl\n");
spicc->pins_idle_low = NULL;
}
return;
}
conf = readl_relaxed(spicc->base + SPICC_ENH_CTL0) |
SPICC_ENH_MOSI_OEN | SPICC_ENH_CLK_OEN | SPICC_ENH_CS_OEN;
......@@ -441,6 +459,16 @@ static int meson_spicc_prepare_message(struct spi_master *master,
else
conf &= ~SPICC_POL;
if (!spicc->data->has_oen) {
if (spi->mode & SPI_CPOL) {
if (spicc->pins_idle_high)
pinctrl_select_state(spicc->pinctrl, spicc->pins_idle_high);
} else {
if (spicc->pins_idle_low)
pinctrl_select_state(spicc->pinctrl, spicc->pins_idle_low);
}
}
if (spi->mode & SPI_CPHA)
conf |= SPICC_PHA;
else
......@@ -487,6 +515,9 @@ static int meson_spicc_unprepare_transfer(struct spi_master *master)
/* Set default configuration, keeping datarate field */
writel_relaxed(conf, spicc->base + SPICC_CONREG);
if (!spicc->data->has_oen)
pinctrl_select_default_state(&spicc->pdev->dev);
return 0;
}
......@@ -798,6 +829,12 @@ static int meson_spicc_probe(struct platform_device *pdev)
goto out_core_clk;
}
spicc->pinctrl = devm_pinctrl_get(&pdev->dev);
if (IS_ERR(spicc->pinctrl)) {
ret = PTR_ERR(spicc->pinctrl);
goto out_clk;
}
device_reset_optional(&pdev->dev);
master->num_chipselect = 4;
......
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