Commit 4287dbaa authored by Todd Poynor's avatar Todd Poynor Committed by Greg Kroah-Hartman

staging: gasket: apex: move driver-private defines out of apex.h

apex.h is supposed to contain kernel-userspace interface definitions,
but has a number of defines that are only used by apex_driver.c or are
not used at all.  Move driver implementation defines not shared with
userspace to the driver source.  Remove unused defines.
Signed-off-by: default avatarTodd Poynor <toddpoynor@google.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 95310545
/* SPDX-License-Identifier: GPL-2.0 */ /* SPDX-License-Identifier: GPL-2.0 */
/* /*
* Apex kernel-userspace interface definition(s). * Apex kernel-userspace interface definitions.
* *
* Copyright (C) 2018 Google, Inc. * Copyright (C) 2018 Google, Inc.
*/ */
...@@ -8,66 +8,8 @@ ...@@ -8,66 +8,8 @@
#define __APEX_H__ #define __APEX_H__
#include <linux/ioctl.h> #include <linux/ioctl.h>
#include <linux/bitops.h>
#include "gasket.h" /* Clock Gating ioctl. */
/* Structural definitions/macros. */
/* The number of PCI BARs. */
#define APEX_NUM_BARS 3
/* Size of a memory page in bytes, and the related number of bits to shift. */
#define APEX_PAGE_SHIFT 12
#define APEX_PAGE_SIZE BIT(APEX_PAGE_SHIFT)
#define APEX_EXTENDED_SHIFT 63 /* Extended address bit position. */
/*
* Addresses are 2^3=8 bytes each. Page in second level page table holds
* APEX_PAGE_SIZE/8 addresses.
*/
#define APEX_ADDR_SHIFT 3
#define APEX_LEVEL_SHIFT (APEX_PAGE_SHIFT - APEX_ADDR_SHIFT)
#define APEX_LEVEL_SIZE BIT(APEX_LEVEL_SHIFT)
#define APEX_PAGE_TABLE_MAX 65536
#define APEX_SIMPLE_PAGE_MAX APEX_PAGE_TABLE_MAX
#define APEX_EXTENDED_PAGE_MAX (APEX_PAGE_TABLE_MAX << APEX_LEVEL_SHIFT)
/* Check reset 120 times */
#define APEX_RESET_RETRY 120
/* Wait 100 ms between checks. Total 12 sec wait maximum. */
#define APEX_RESET_DELAY 100
#define APEX_CHIP_INIT_DONE 2
#define APEX_RESET_ACCEPTED 0
enum apex_reset_types {
APEX_CHIP_REINIT_RESET = 3,
};
/* Interrupt defines */
/* Gasket device interrupts enums must be dense (i.e., no empty slots). */
enum apex_interrupt {
APEX_INTERRUPT_INSTR_QUEUE = 0,
APEX_INTERRUPT_INPUT_ACTV_QUEUE = 1,
APEX_INTERRUPT_PARAM_QUEUE = 2,
APEX_INTERRUPT_OUTPUT_ACTV_QUEUE = 3,
APEX_INTERRUPT_SC_HOST_0 = 4,
APEX_INTERRUPT_SC_HOST_1 = 5,
APEX_INTERRUPT_SC_HOST_2 = 6,
APEX_INTERRUPT_SC_HOST_3 = 7,
APEX_INTERRUPT_TOP_LEVEL_0 = 8,
APEX_INTERRUPT_TOP_LEVEL_1 = 9,
APEX_INTERRUPT_TOP_LEVEL_2 = 10,
APEX_INTERRUPT_TOP_LEVEL_3 = 11,
APEX_INTERRUPT_FATAL_ERR = 12,
APEX_INTERRUPT_COUNT = 13,
};
/*
* Clock Gating ioctl.
*/
struct apex_gate_clock_ioctl { struct apex_gate_clock_ioctl {
/* Enter or leave clock gated state. */ /* Enter or leave clock gated state. */
u64 enable; u64 enable;
......
...@@ -54,6 +54,17 @@ ...@@ -54,6 +54,17 @@
*/ */
#define APEX_PAGE_TABLE_TOTAL_ENTRIES 8192 #define APEX_PAGE_TABLE_TOTAL_ENTRIES 8192
#define APEX_EXTENDED_SHIFT 63 /* Extended address bit position. */
enum apex_reset_types {
APEX_CHIP_REINIT_RESET = 3,
};
/* Check reset 120 times */
#define APEX_RESET_RETRY 120
/* Wait 100 ms between checks. Total 12 sec wait maximum. */
#define APEX_RESET_DELAY 100
/* Enumeration of the supported sysfs entries. */ /* Enumeration of the supported sysfs entries. */
enum sysfs_attribute_type { enum sysfs_attribute_type {
ATTR_KERNEL_HIB_PAGE_TABLE_SIZE, ATTR_KERNEL_HIB_PAGE_TABLE_SIZE,
...@@ -133,6 +144,24 @@ static const struct gasket_mappable_region mappable_regions[NUM_REGIONS] = { ...@@ -133,6 +144,24 @@ static const struct gasket_mappable_region mappable_regions[NUM_REGIONS] = {
static const struct gasket_mappable_region cm_mappable_regions[1] = { { 0x0, static const struct gasket_mappable_region cm_mappable_regions[1] = { { 0x0,
APEX_CH_MEM_BYTES } }; APEX_CH_MEM_BYTES } };
/* Gasket device interrupts enums must be dense (i.e., no empty slots). */
enum apex_interrupt {
APEX_INTERRUPT_INSTR_QUEUE = 0,
APEX_INTERRUPT_INPUT_ACTV_QUEUE = 1,
APEX_INTERRUPT_PARAM_QUEUE = 2,
APEX_INTERRUPT_OUTPUT_ACTV_QUEUE = 3,
APEX_INTERRUPT_SC_HOST_0 = 4,
APEX_INTERRUPT_SC_HOST_1 = 5,
APEX_INTERRUPT_SC_HOST_2 = 6,
APEX_INTERRUPT_SC_HOST_3 = 7,
APEX_INTERRUPT_TOP_LEVEL_0 = 8,
APEX_INTERRUPT_TOP_LEVEL_1 = 9,
APEX_INTERRUPT_TOP_LEVEL_2 = 10,
APEX_INTERRUPT_TOP_LEVEL_3 = 11,
APEX_INTERRUPT_FATAL_ERR = 12,
APEX_INTERRUPT_COUNT = 13,
};
/* Interrupt descriptors for Apex */ /* Interrupt descriptors for Apex */
static struct gasket_interrupt_desc apex_interrupts[] = { static struct gasket_interrupt_desc apex_interrupts[] = {
{ {
......
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