Skip to content

L
linux
Commit 43a431e4 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab Committed by Mauro Carvalho Chehab
Browse files
Options

[media] drx-j: get rid of the integer typedefs 

Patch created using this small script:

for j in 8 16 32; do for i in *; do sed s,pu${j}_t,"u$j *",g <$i >a && mv a $i; done; done
for j in 8 16 32; do for i in *; do sed s,ps${j}_t,"s$j *",g <$i >a && mv a $i; done; done
for j in 8 16 32; do for i in *; do sed s,s${j}_t,"s$j",g <$i >a && mv a $i; done; done
for j in 8 16 32; do for i in *; do sed s,u${j}_t,"u$j",g <$i >a && mv a $i; done; done

and fixing the bsp_types.h header.
Acked-by: default avatarDevin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent bab3fcca
Hide whitespace changes
Inline Side-by-side
Showing with 1182 additions and 1270 deletions
drivers/media/dvb-frontends/drx39xyj/bsp_host.h
View file @ 43a431e4
......@@ -61,13 +61,13 @@ Exported FUNCTIONS
DRXStatus_t DRXBSP_HST_Term(void);
void *DRXBSP_HST_Memcpy(void *to, void *from, u32_t n);
void *DRXBSP_HST_Memcpy(void *to, void *from, u32 n);
int DRXBSP_HST_Memcmp(void *s1, void *s2, u32_t n);
int DRXBSP_HST_Memcmp(void *s1, void *s2, u32 n);
u32_t DRXBSP_HST_Clock(void);
u32 DRXBSP_HST_Clock(void);
DRXStatus_t DRXBSP_HST_Sleep(u32_t n);
DRXStatus_t DRXBSP_HST_Sleep(u32 n);
/*-------------------------------------------------------------------------
THE END
......
drivers/media/dvb-frontends/drx39xyj/bsp_i2c.h
View file @ 43a431e4
......@@ -42,8 +42,6 @@
*
*/
#include <linux/kernel.h>
#ifndef __BSPI2C_H__
#define __BSPI2C_H__
......@@ -95,11 +93,11 @@ Exported FUNCTIONS
/**
* \fn DRXStatus_t DRXBSP_I2C_WriteRead( struct i2c_device_addr *wDevAddr,
* u16_t wCount,
* pu8_t wData,
* u16 wCount,
* u8 *wData,
* struct i2c_device_addr *rDevAddr,
* u16_t rCount,
* pu8_t rData)
* u16 rCount,
* u8 *rData)
* \brief Read and/or write count bytes from I2C bus, store them in data[].
* \param wDevAddr The device i2c address and the device ID to write to
* \param wCount The number of bytes to write
......@@ -124,10 +122,10 @@ Exported FUNCTIONS
* It can be used to control a "switch" on the I2C bus to the correct device.
*/
DRXStatus_t DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr,
u16_t wCount,
pu8_t wData,
u16 wCount,
u8 *wData,
struct i2c_device_addr *rDevAddr,
u16_t rCount, pu8_t rData);
u16 rCount, u8 *rData);
/**
* \fn DRXBSP_I2C_ErrorText()
......
drivers/media/dvb-frontends/drx39xyj/bsp_tuner.h
View file @ 43a431e4
......@@ -79,8 +79,8 @@ DEFINES
TYPEDEFS
------------------------------------------------------------------------------*/
typedef u32_t TUNERMode_t;
typedef pu32_t pTUNERMode_t;
typedef u32 TUNERMode_t;
typedef u32 *pTUNERMode_t;
typedef char *TUNERSubMode_t; /* description of submode */
typedef TUNERSubMode_t *pTUNERSubMode_t;
......@@ -97,9 +97,9 @@ TYPEDEFS
DRXFrequency_t minFreqRF; /* Lowest RF input frequency, in kHz */
DRXFrequency_t maxFreqRF; /* Highest RF input frequency, in kHz */
u8_t subMode; /* Index to sub-mode in use */
u8 subMode; /* Index to sub-mode in use */
pTUNERSubMode_t subModeDescriptions; /* Pointer to description of sub-modes */
u8_t subModes; /* Number of available sub-modes */
u8 subModes; /* Number of available sub-modes */
/* The following fields will be either 0, NULL or FALSE and do not need
initialisation */
......@@ -109,7 +109,7 @@ TYPEDEFS
DRXFrequency_t IFfrequency; /* only valid if programmed */
void *myUserData; /* pointer to associated demod instance */
u16_t myCapabilities; /* value for storing application flags */
u16 myCapabilities; /* value for storing application flags */
} TUNERCommonAttr_t, *pTUNERCommonAttr_t;
......@@ -139,11 +139,11 @@ TYPEDEFS
typedef DRXStatus_t(*TUNERi2cWriteReadFunc_t) (pTUNERInstance_t tuner,
struct i2c_device_addr *
wDevAddr, u16_t wCount,
pu8_t wData,
wDevAddr, u16 wCount,
u8 *wData,
struct i2c_device_addr *
rDevAddr, u16_t rCount,
pu8_t rData);
rDevAddr, u16 rCount,
u8 *rData);
typedef struct {
TUNEROpenFunc_t openFunc;
......@@ -194,10 +194,10 @@ Exported FUNCTIONS
DRXStatus_t DRXBSP_TUNER_DefaultI2CWriteRead(pTUNERInstance_t tuner,
struct i2c_device_addr *wDevAddr,
u16_t wCount,
pu8_t wData,
u16 wCount,
u8 *wData,
struct i2c_device_addr *rDevAddr,
u16_t rCount, pu8_t rData);
u16 rCount, u8 *rData);
/*------------------------------------------------------------------------------
THE END
......
drivers/media/dvb-frontends/drx39xyj/bsp_types.h
View file @ 43a431e4
......@@ -39,6 +39,8 @@
*
*/
#include <linux/kernel.h>
#ifndef __BSP_TYPES_H__
#define __BSP_TYPES_H__
/*-------------------------------------------------------------------------
......@@ -53,98 +55,10 @@ TYPEDEFS
-------------------------------------------------------------------------*/
/**
* \typedef unsigned char u8_t
* \brief type definition of an unsigned 8 bits integer
*/
typedef unsigned char u8_t;
/**
* \typedef char s8_t
* \brief type definition of a signed 8 bits integer
*/
typedef char s8_t;
/**
* \typedef unsigned short u16_t *pu16_t
* \brief type definition of an unsigned 16 bits integer
*/
typedef unsigned short u16_t;
/**
* \typedef short s16_t
* \brief type definition of a signed 16 bits integer
*/
typedef short s16_t;
/**
* \typedef unsigned long u32_t
* \brief type definition of an unsigned 32 bits integer
*/
typedef unsigned long u32_t;
/**
* \typedef long s32_t
* \brief type definition of a signed 32 bits integer
*/
typedef long s32_t;
/*
* \typedef struct ... u64_t
* \brief type definition of an usigned 64 bits integer
*/
typedef struct {
u32_t MSLW;
u32_t LSLW;
} u64_t;
/*
* \typedef struct ... i64_t
* \brief type definition of a signed 64 bits integer
*/
typedef struct {
s32_t MSLW;
u32_t LSLW;
} s64_t;
/**
* \typedef u8_t *pu8_t
* \brief type definition of pointer to an unsigned 8 bits integer
*/
typedef u8_t *pu8_t;
/**
* \typedef s8_t *ps8_t
* \brief type definition of pointer to a signed 8 bits integer
*/
typedef s8_t *ps8_t;
/**
* \typedef u16_t *pu16_t
* \brief type definition of pointer to an unsigned 16 bits integer
*/
typedef u16_t *pu16_t;
/**
* \typedef s16_t *ps16_t
* \brief type definition of pointer to a signed 16 bits integer
*/
typedef s16_t *ps16_t;
/**
* \typedef u32_t *pu32_t
* \brief type definition of pointer to an unsigned 32 bits integer
*/
typedef u32_t *pu32_t;
/**
* \typedef s32_t *ps32_t
* \brief type definition of pointer to a signed 32 bits integer
*/
typedef s32_t *ps32_t;
/**
* \typedef u64_t *pu64_t
* \brief type definition of pointer to an usigned 64 bits integer
*/
typedef u64_t *pu64_t;
/**
* \typedef s64_t *ps64_t
* \brief type definition of pointer to a signed 64 bits integer
*/
typedef s64_t *ps64_t;
/**
* \typedef s32_t DRXFrequency_t
* \typedef s32 DRXFrequency_t
* \brief type definition of frequency
*/
typedef s32_t DRXFrequency_t;
typedef s32 DRXFrequency_t;
/**
* \typedef DRXFrequency_t *pDRXFrequency_t
......@@ -153,10 +67,10 @@ TYPEDEFS
typedef DRXFrequency_t *pDRXFrequency_t;
/**
* \typedef u32_t DRXSymbolrate_t
* \typedef u32 DRXSymbolrate_t
* \brief type definition of symbol rate
*/
typedef u32_t DRXSymbolrate_t;
typedef u32 DRXSymbolrate_t;
/**
* \typedef DRXSymbolrate_t *pDRXSymbolrate_t
......
drivers/media/dvb-frontends/drx39xyj/drx39xxj_dummy.c
View file @ 43a431e4
......@@ -39,32 +39,32 @@ DRXBSP_TUNER_GetFrequency(pTUNERInstance_t tuner,
return DRX_STS_OK;
}
DRXStatus_t DRXBSP_HST_Sleep(u32_t n)
DRXStatus_t DRXBSP_HST_Sleep(u32 n)
{
msleep(n);
return DRX_STS_OK;
}
u32_t DRXBSP_HST_Clock(void)
u32 DRXBSP_HST_Clock(void)
{
return jiffies_to_msecs(jiffies);
}
int DRXBSP_HST_Memcmp(void *s1, void *s2, u32_t n)
int DRXBSP_HST_Memcmp(void *s1, void *s2, u32 n)
{
return (memcmp(s1, s2, (size_t) n));
}
void *DRXBSP_HST_Memcpy(void *to, void *from, u32_t n)
void *DRXBSP_HST_Memcpy(void *to, void *from, u32 n)
{
return (memcpy(to, from, (size_t) n));
}
DRXStatus_t DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr,
u16_t wCount,
pu8_t wData,
u16 wCount,
u8 *wData,
struct i2c_device_addr *rDevAddr,
u16_t rCount, pu8_t rData)
u16 rCount, u8 *rData)
{
struct drx39xxj_state *state;
struct i2c_msg msg[2];
......
drivers/media/dvb-frontends/drx39xyj/drx_dap_fasi.c
View file @ 43a431e4
......@@ -57,63 +57,63 @@
/* Function prototypes */
static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16_t datasize, /* size of data */
pu8_t data, /* data to send */
u16 datasize, /* size of data */
u8 *data, /* data to send */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16_t datasize, /* size of data */
pu8_t data, /* data to send */
u16 datasize, /* size of data */
u8 *data, /* data to send */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_WriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u8_t data, /* data to write */
u8 data, /* data to write */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
pu8_t data, /* buffer to receive data */
u8 *data, /* buffer to receive data */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u8_t datain, /* data to send */
pu8_t dataout); /* data to receive back */
u8 datain, /* data to send */
u8 *dataout); /* data to receive back */
static DRXStatus_t DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u16_t data, /* data to write */
u16 data, /* data to write */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
pu16_t data, /* buffer to receive data */
u16 *data, /* buffer to receive data */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u16_t datain, /* data to send */
pu16_t dataout); /* data to receive back */
u16 datain, /* data to send */
u16 *dataout); /* data to receive back */
static DRXStatus_t DRXDAP_FASI_WriteReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u32_t data, /* data to write */
u32 data, /* data to write */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
pu32_t data, /* buffer to receive data */
u32 *data, /* buffer to receive data */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u32_t datain, /* data to send */
pu32_t dataout); /* data to receive back */
u32 datain, /* data to send */
u32 *dataout); /* data to receive back */
/* The version structure of this protocol implementation */
char drxDapFASIModuleName[] = "FASI Data Access Protocol";
......@@ -151,7 +151,7 @@ DRXAccessFunc_t drxDapFASIFunct_g = {
static DRXStatus_t DRXDAP_FASI_WriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u8_t data, /* data to write */
u8 data, /* data to write */
DRXflags_t flags)
{ /* special device flags */
return DRX_STS_ERROR;
......@@ -159,7 +159,7 @@ static DRXStatus_t DRXDAP_FASI_WriteReg8(struct i2c_device_addr *devAddr, /* add
static DRXStatus_t DRXDAP_FASI_ReadReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
pu8_t data, /* buffer to receive data */
u8 *data, /* buffer to receive data */
DRXflags_t flags)
{ /* special device flags */
return DRX_STS_ERROR;
......@@ -168,8 +168,8 @@ static DRXStatus_t DRXDAP_FASI_ReadReg8(struct i2c_device_addr *devAddr, /* addr
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u8_t datain, /* data to send */
pu8_t dataout)
u8 datain, /* data to send */
u8 *dataout)
{ /* data to receive back */
return DRX_STS_ERROR;
}
......@@ -177,8 +177,8 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8(struct i2c_device_addr *devAd
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u32_t datain, /* data to send */
pu32_t dataout)
u32 datain, /* data to send */
u32 *dataout)
{ /* data to receive back */
return DRX_STS_ERROR;
}
......@@ -190,8 +190,8 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devA
* DRXStatus_t DRXDAP_FASI_ReadBlock (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u16_t datasize, -- number of bytes to read
* pu8_t data, -- data to receive
* u16 datasize, -- number of bytes to read
* u8 *data, -- data to receive
* DRXflags_t flags) -- special device flags
*
* Read block data from chip address. Because the chip is word oriented,
......@@ -212,13 +212,13 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devA
static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u16_t datasize,
pu8_t data, DRXflags_t flags)
u16 datasize,
u8 *data, DRXflags_t flags)
{
u8_t buf[4];
u16_t bufx;
u8 buf[4];
u16 bufx;
DRXStatus_t rc;
u16_t overheadSize = 0;
u16 overheadSize = 0;
/* Check parameters ******************************************************* */
if (devAddr == NULL) {
......@@ -244,7 +244,7 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr,
/* Read block from I2C **************************************************** */
do {
u16_t todo = (datasize < DRXDAP_MAX_RCHUNKSIZE ?
u16 todo = (datasize < DRXDAP_MAX_RCHUNKSIZE ?
datasize : DRXDAP_MAX_RCHUNKSIZE);
bufx = 0;
......@@ -258,19 +258,19 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr,
if (DRXDAP_FASI_LONG_FORMAT(addr)) {
#endif
#if ( DRXDAPFASI_LONG_ADDR_ALLOWED==1 )
buf[bufx++] = (u8_t) (((addr << 1) & 0xFF) | 0x01);
buf[bufx++] = (u8_t) ((addr >> 16) & 0xFF);
buf[bufx++] = (u8_t) ((addr >> 24) & 0xFF);
buf[bufx++] = (u8_t) ((addr >> 7) & 0xFF);
buf[bufx++] = (u8) (((addr << 1) & 0xFF) | 0x01);
buf[bufx++] = (u8) ((addr >> 16) & 0xFF);
buf[bufx++] = (u8) ((addr >> 24) & 0xFF);
buf[bufx++] = (u8) ((addr >> 7) & 0xFF);
#endif
#if ( ( DRXDAPFASI_LONG_ADDR_ALLOWED==1 ) && \
( DRXDAPFASI_SHORT_ADDR_ALLOWED==1 ) )
} else {
#endif
#if ( DRXDAPFASI_SHORT_ADDR_ALLOWED==1 )
buf[bufx++] = (u8_t) ((addr << 1) & 0xFF);
buf[bufx++] = (u8) ((addr << 1) & 0xFF);
buf[bufx++] =
(u8_t) (((addr >> 16) & 0x0F) |
(u8) (((addr >> 16) & 0x0F) |
((addr >> 18) & 0xF0));
#endif
#if ( ( DRXDAPFASI_LONG_ADDR_ALLOWED==1 ) && \
......@@ -306,8 +306,8 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr,
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t waddr, -- address of chip register/memory
* DRXaddr_t raddr, -- chip address to read back from
* u16_t wdata, -- data to send
* pu16_t rdata) -- data to receive back
* u16 wdata, -- data to send
* u16 *rdata) -- data to receive back
*
* Write 16-bit data, then read back the original contents of that location.
* Requires long addressing format to be allowed.
......@@ -328,7 +328,7 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr,
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devAddr,
DRXaddr_t waddr,
DRXaddr_t raddr,
u16_t wdata, pu16_t rdata)
u16 wdata, u16 *rdata)
{
DRXStatus_t rc = DRX_STS_ERROR;
......@@ -351,7 +351,7 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devA
* DRXStatus_t DRXDAP_FASI_ReadReg16 (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* pu16_t data, -- data to receive
* u16 *data, -- data to receive
* DRXflags_t flags) -- special device flags
*
* Read one 16-bit register or memory location. The data received back is
......@@ -366,16 +366,16 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devA
static DRXStatus_t DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
pu16_t data, DRXflags_t flags)
u16 *data, DRXflags_t flags)
{
u8_t buf[sizeof(*data)];
u8 buf[sizeof(*data)];
DRXStatus_t rc;
if (!data) {
return DRX_STS_INVALID_ARG;
}
rc = DRXDAP_FASI_ReadBlock(devAddr, addr, sizeof(*data), buf, flags);
*data = buf[0] + (((u16_t) buf[1]) << 8);
*data = buf[0] + (((u16) buf[1]) << 8);
return rc;
}
......@@ -384,7 +384,7 @@ static DRXStatus_t DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr,
* DRXStatus_t DRXDAP_FASI_ReadReg32 (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* pu32_t data, -- data to receive
* u32 *data, -- data to receive
* DRXflags_t flags) -- special device flags
*
* Read one 32-bit register or memory location. The data received back is
......@@ -399,18 +399,18 @@ static DRXStatus_t DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr,
static DRXStatus_t DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
pu32_t data, DRXflags_t flags)
u32 *data, DRXflags_t flags)
{
u8_t buf[sizeof(*data)];
u8 buf[sizeof(*data)];
DRXStatus_t rc;
if (!data) {
return DRX_STS_INVALID_ARG;
}
rc = DRXDAP_FASI_ReadBlock(devAddr, addr, sizeof(*data), buf, flags);
*data = (((u32_t) buf[0]) << 0) +
(((u32_t) buf[1]) << 8) +
(((u32_t) buf[2]) << 16) + (((u32_t) buf[3]) << 24);
*data = (((u32) buf[0]) << 0) +
(((u32) buf[1]) << 8) +
(((u32) buf[2]) << 16) + (((u32) buf[3]) << 24);
return rc;
}
......@@ -419,8 +419,8 @@ static DRXStatus_t DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr,
* DRXStatus_t DRXDAP_FASI_WriteBlock (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u16_t datasize, -- number of bytes to read
* pu8_t data, -- data to receive
* u16 datasize, -- number of bytes to read
* u8 *data, -- data to receive
* DRXflags_t flags) -- special device flags
*
* Write block data to chip address. Because the chip is word oriented,
......@@ -438,14 +438,14 @@ static DRXStatus_t DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr,
static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u16_t datasize,
pu8_t data, DRXflags_t flags)
u16 datasize,
u8 *data, DRXflags_t flags)
{
u8_t buf[DRXDAP_MAX_WCHUNKSIZE];
u8 buf[DRXDAP_MAX_WCHUNKSIZE];
DRXStatus_t st = DRX_STS_ERROR;
DRXStatus_t firstErr = DRX_STS_OK;
u16_t overheadSize = 0;
u16_t blockSize = 0;
u16 overheadSize = 0;
u16 blockSize = 0;
/* Check parameters ******************************************************* */
if (devAddr == NULL) {
......@@ -472,8 +472,8 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
/* Write block to I2C ***************************************************** */
blockSize = ((DRXDAP_MAX_WCHUNKSIZE) - overheadSize) & ~1;
do {
u16_t todo = 0;
u16_t bufx = 0;
u16 todo = 0;
u16 bufx = 0;
/* Buffer device address */
addr &= ~DRXDAP_FASI_FLAGS;
......@@ -484,19 +484,19 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
if (DRXDAP_FASI_LONG_FORMAT(addr)) {
#endif
#if ( (DRXDAPFASI_LONG_ADDR_ALLOWED)==1 )
buf[bufx++] = (u8_t) (((addr << 1) & 0xFF) | 0x01);
buf[bufx++] = (u8_t) ((addr >> 16) & 0xFF);
buf[bufx++] = (u8_t) ((addr >> 24) & 0xFF);
buf[bufx++] = (u8_t) ((addr >> 7) & 0xFF);
buf[bufx++] = (u8) (((addr << 1) & 0xFF) | 0x01);
buf[bufx++] = (u8) ((addr >> 16) & 0xFF);
buf[bufx++] = (u8) ((addr >> 24) & 0xFF);
buf[bufx++] = (u8) ((addr >> 7) & 0xFF);
#endif
#if ( ( (DRXDAPFASI_LONG_ADDR_ALLOWED)==1 ) && \
( (DRXDAPFASI_SHORT_ADDR_ALLOWED)==1 ) )
} else {
#endif
#if ( (DRXDAPFASI_SHORT_ADDR_ALLOWED)==1 )
buf[bufx++] = (u8_t) ((addr << 1) & 0xFF);
buf[bufx++] = (u8) ((addr << 1) & 0xFF);
buf[bufx++] =
(u8_t) (((addr >> 16) & 0x0F) |
(u8) (((addr >> 16) & 0x0F) |
((addr >> 18) & 0xF0));
#endif
#if ( ( (DRXDAPFASI_LONG_ADDR_ALLOWED)==1 ) && \
......@@ -514,8 +514,8 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
*/
todo = (blockSize < datasize ? blockSize : datasize);
if (todo == 0) {
u16_t overheadSizeI2cAddr = 0;
u16_t dataBlockSize = 0;
u16 overheadSizeI2cAddr = 0;
u16 dataBlockSize = 0;
overheadSizeI2cAddr =
(IS_I2C_10BIT(devAddr->i2cAddr) ? 2 : 1);
......@@ -524,10 +524,10 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
/* write device address */
st = DRXBSP_I2C_WriteRead(devAddr,
(u16_t) (bufx),
(u16) (bufx),
buf,
(struct i2c_device_addr *) (NULL),
0, (pu8_t) (NULL));
0, (u8 *) (NULL));
if ((st != DRX_STS_OK) && (firstErr == DRX_STS_OK)) {
/* at the end, return the first error encountered */
......@@ -541,10 +541,10 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
DRXBSP_HST_Memcpy(&buf[bufx], data, todo);
/* write (address if can do and) data */
st = DRXBSP_I2C_WriteRead(devAddr,
(u16_t) (bufx + todo),
(u16) (bufx + todo),
buf,
(struct i2c_device_addr *) (NULL),
0, (pu8_t) (NULL));
0, (u8 *) (NULL));
if ((st != DRX_STS_OK) && (firstErr == DRX_STS_OK)) {
/* at the end, return the first error encountered */
......@@ -563,7 +563,7 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
* DRXStatus_t DRXDAP_FASI_WriteReg16 (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u16_t data, -- data to send
* u16 data, -- data to send
* DRXflags_t flags) -- special device flags
*
* Write one 16-bit register or memory location. The data being written is
......@@ -577,12 +577,12 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
static DRXStatus_t DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u16_t data, DRXflags_t flags)
u16 data, DRXflags_t flags)
{
u8_t buf[sizeof(data)];
u8 buf[sizeof(data)];
buf[0] = (u8_t) ((data >> 0) & 0xFF);
buf[1] = (u8_t) ((data >> 8) & 0xFF);
buf[0] = (u8) ((data >> 0) & 0xFF);
buf[1] = (u8) ((data >> 8) & 0xFF);
return DRXDAP_FASI_WriteBlock(devAddr, addr, sizeof(data), buf, flags);
}
......@@ -592,7 +592,7 @@ static DRXStatus_t DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr,
* DRXStatus_t DRXDAP_FASI_WriteReg32 (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u32_t data, -- data to send
* u32 data, -- data to send
* DRXflags_t flags) -- special device flags
*
* Write one 32-bit register or memory location. The data being written is
......@@ -606,14 +606,14 @@ static DRXStatus_t DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr,
static DRXStatus_t DRXDAP_FASI_WriteReg32(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u32_t data, DRXflags_t flags)
u32 data, DRXflags_t flags)
{
u8_t buf[sizeof(data)];
u8 buf[sizeof(data)];
buf[0] = (u8_t) ((data >> 0) & 0xFF);
buf[1] = (u8_t) ((data >> 8) & 0xFF);
buf[2] = (u8_t) ((data >> 16) & 0xFF);
buf[3] = (u8_t) ((data >> 24) & 0xFF);
buf[0] = (u8) ((data >> 0) & 0xFF);
buf[1] = (u8) ((data >> 8) & 0xFF);
buf[2] = (u8) ((data >> 16) & 0xFF);
buf[3] = (u8) ((data >> 24) & 0xFF);
return DRXDAP_FASI_WriteBlock(devAddr, addr, sizeof(data), buf, flags);
}
drivers/media/dvb-frontends/drx39xyj/drx_driver.c
View file @ 43a431e4
......@@ -60,7 +60,7 @@ DEFINES
/** \brief Magic word for checking correct Endianess of microcode data. */
#ifndef DRX_UCODE_MAGIC_WORD
#define DRX_UCODE_MAGIC_WORD ((((u16_t)'H')<<8)+((u16_t)'L'))
#define DRX_UCODE_MAGIC_WORD ((((u16)'H')<<8)+((u16)'L'))
#endif
/** \brief CRC flag in ucode header, flags field. */
......@@ -119,17 +119,17 @@ STRUCTURES
------------------------------------------------------------------------------*/
/** \brief Structure of the microcode block headers */
typedef struct {
u32_t addr;
u32 addr;
/**< Destination address of the data in this block */
u16_t size;
u16 size;
/**< Size of the block data following this header counted in
16 bits words */
u16_t flags;
u16 flags;
/**< Flags for this data block:
- bit[0]= CRC on/off
- bit[1]= compression on/off
- bit[15..2]=reserved */
u16_t CRC;/**< CRC value of the data block, only valid if CRC flag is
u16 CRC;/**< CRC value of the data block, only valid if CRC flag is
set. */
} DRXUCodeBlockHdr_t, *pDRXUCodeBlockHdr_t;
......@@ -217,13 +217,13 @@ static DRXStatus_t ScanWaitForLock(pDRXDemodInstance_t demod, pBool_t isLocked)
Bool_t doneWaiting = FALSE;
DRXLockStatus_t lockState = DRX_NOT_LOCKED;
DRXLockStatus_t desiredLockState = DRX_NOT_LOCKED;
u32_t timeoutValue = 0;
u32_t startTimeLockStage = 0;
u32_t currentTime = 0;
u32_t timerValue = 0;
u32 timeoutValue = 0;
u32 startTimeLockStage = 0;
u32 currentTime = 0;
u32 timerValue = 0;
*isLocked = FALSE;
timeoutValue = (u32_t) demod->myCommonAttr->scanDemodLockTimeout;
timeoutValue = (u32) demod->myCommonAttr->scanDemodLockTimeout;
desiredLockState = demod->myCommonAttr->scanDesiredLock;
startTimeLockStage = DRXBSP_HST_Clock();
......@@ -277,8 +277,8 @@ static DRXStatus_t
ScanPrepareNextScan(pDRXDemodInstance_t demod, DRXFrequency_t skip)
{
pDRXCommonAttr_t commonAttr = (pDRXCommonAttr_t) (NULL);
u16_t tableIndex = 0;
u16_t frequencyPlanSize = 0;
u16 tableIndex = 0;
u16 frequencyPlanSize = 0;
pDRXFrequencyPlan_t frequencyPlan = (pDRXFrequencyPlan_t) (NULL);
DRXFrequency_t nextFrequency = 0;
DRXFrequency_t tunerMinFrequency = 0;
......@@ -419,8 +419,8 @@ CtrlScanInit(pDRXDemodInstance_t demod, pDRXScanParam_t scanParam)
pDRXCommonAttr_t commonAttr = (pDRXCommonAttr_t) (NULL);
DRXFrequency_t maxTunerFreq = 0;
DRXFrequency_t minTunerFreq = 0;
u16_t nrChannelsInPlan = 0;
u16_t i = 0;
u16 nrChannelsInPlan = 0;
u16 i = 0;
void *scanContext = NULL;
commonAttr = (pDRXCommonAttr_t) demod->myCommonAttr;
......@@ -509,7 +509,7 @@ CtrlScanInit(pDRXDemodInstance_t demod, pDRXScanParam_t scanParam)
in this frequency plan. */
if ((minFreq != 0) && (maxFreq != 0)) {
nrChannelsInPlan +=
(u16_t) (((maxFreq - minFreq) / step) + 1);
(u16) (((maxFreq - minFreq) / step) + 1);
/* Determine first frequency (within tuner range) to scan */
if (commonAttr->scanNextFrequency == 0) {
......@@ -602,13 +602,13 @@ static DRXStatus_t CtrlScanStop(pDRXDemodInstance_t demod)
* Progress indication will run from 0 upto DRX_SCAN_MAX_PROGRESS during scan.
*
*/
static DRXStatus_t CtrlScanNext(pDRXDemodInstance_t demod, pu16_t scanProgress)
static DRXStatus_t CtrlScanNext(pDRXDemodInstance_t demod, u16 *scanProgress)
{
pDRXCommonAttr_t commonAttr = (pDRXCommonAttr_t) (NULL);
pBool_t scanReady = (pBool_t) (NULL);
u16_t maxProgress = DRX_SCAN_MAX_PROGRESS;
u32_t numTries = 0;
u32_t i = 0;
u16 maxProgress = DRX_SCAN_MAX_PROGRESS;
u32 numTries = 0;
u32 i = 0;
commonAttr = (pDRXCommonAttr_t) demod->myCommonAttr;
......@@ -627,8 +627,8 @@ static DRXStatus_t CtrlScanNext(pDRXDemodInstance_t demod, pu16_t scanProgress)
return DRX_STS_ERROR;
}
*scanProgress = (u16_t) (((commonAttr->scanChannelsScanned) *
((u32_t) (maxProgress))) /
*scanProgress = (u16) (((commonAttr->scanChannelsScanned) *
((u32) (maxProgress))) /
(commonAttr->scanMaxChannels));
/* Scan */
......@@ -683,8 +683,8 @@ static DRXStatus_t CtrlScanNext(pDRXDemodInstance_t demod, pu16_t scanProgress)
/* keep track of progress */
*scanProgress =
(u16_t) (((commonAttr->scanChannelsScanned) *
((u32_t) (maxProgress))) /
(u16) (((commonAttr->scanChannelsScanned) *
((u32) (maxProgress))) /
(commonAttr->scanMaxChannels));
if (nextStatus != DRX_STS_OK) {
......@@ -843,7 +843,7 @@ CtrlProgramTuner(pDRXDemodInstance_t demod, pDRXChannel_t channel)
DRXStatus_t CtrlDumpRegisters(pDRXDemodInstance_t demod,
pDRXRegDump_t registers)
{
u16_t i = 0;
u16 i = 0;
if (registers == NULL) {
/* registers not supplied */
......@@ -853,20 +853,20 @@ DRXStatus_t CtrlDumpRegisters(pDRXDemodInstance_t demod,
/* start dumping registers */
while (registers[i].address != 0) {
DRXStatus_t status = DRX_STS_ERROR;
u16_t value = 0;
u32_t data = 0;
u16 value = 0;
u32 data = 0;
status =
demod->myAccessFunct->readReg16Func(demod->myI2CDevAddr,
registers[i].address,
&value, 0);
data = (u32_t) value;
data = (u32) value;
if (status != DRX_STS_OK) {
/* no breakouts;
depending on device ID, some HW blocks might not be available */
data |= ((u32_t) status) << 16;
data |= ((u32) status) << 16;
}
registers[i].data = data;
i++;
......@@ -885,21 +885,21 @@ DRXStatus_t CtrlDumpRegisters(pDRXDemodInstance_t demod,
/**
* \brief Read a 16 bits word, expects big endian data.
* \param addr: Pointer to memory from which to read the 16 bits word.
* \return u16_t The data read.
* \return u16 The data read.
*
* This function takes care of the possible difference in endianness between the
* host and the data contained in the microcode image file.
*
*/
static u16_t UCodeRead16(pu8_t addr)
static u16 UCodeRead16(u8 *addr)
{
/* Works fo any host processor */
u16_t word = 0;
u16 word = 0;
word = ((u16_t) addr[0]);
word = ((u16) addr[0]);
word <<= 8;
word |= ((u16_t) addr[1]);
word |= ((u16) addr[1]);
return word;
}
......@@ -909,25 +909,25 @@ static u16_t UCodeRead16(pu8_t addr)
/**
* \brief Read a 32 bits word, expects big endian data.
* \param addr: Pointer to memory from which to read the 32 bits word.
* \return u32_t The data read.
* \return u32 The data read.
*
* This function takes care of the possible difference in endianness between the
* host and the data contained in the microcode image file.
*
*/
static u32_t UCodeRead32(pu8_t addr)
static u32 UCodeRead32(u8 *addr)
{
/* Works fo any host processor */
u32_t word = 0;
u32 word = 0;
word = ((u16_t) addr[0]);
word = ((u16) addr[0]);
word <<= 8;
word |= ((u16_t) addr[1]);
word |= ((u16) addr[1]);
word <<= 8;
word |= ((u16_t) addr[2]);
word |= ((u16) addr[2]);
word <<= 8;
word |= ((u16_t) addr[3]);
word |= ((u16) addr[3]);
return word;
}
......@@ -938,17 +938,17 @@ static u32_t UCodeRead32(pu8_t addr)
* \brief Compute CRC of block of microcode data.
* \param blockData: Pointer to microcode data.
* \param nrWords: Size of microcode block (number of 16 bits words).
* \return u16_t The computed CRC residu.
* \return u16 The computed CRC residu.
*/
static u16_t UCodeComputeCRC(pu8_t blockData, u16_t nrWords)
static u16 UCodeComputeCRC(u8 *blockData, u16 nrWords)
{
u16_t i = 0;
u16_t j = 0;
u32_t CRCWord = 0;
u32_t carry = 0;
u16 i = 0;
u16 j = 0;
u32 CRCWord = 0;
u32 carry = 0;
while (i < nrWords) {
CRCWord |= (u32_t) UCodeRead16(blockData);
CRCWord |= (u32) UCodeRead16(blockData);
for (j = 0; j < 16; j++) {
CRCWord <<= 1;
if (carry != 0) {
......@@ -957,9 +957,9 @@ static u16_t UCodeComputeCRC(pu8_t blockData, u16_t nrWords)
carry = CRCWord & 0x80000000UL;
}
i++;
blockData += (sizeof(u16_t));
blockData += (sizeof(u16));
}
return ((u16_t) (CRCWord >> 16));
return ((u16) (CRCWord >> 16));
}
/*============================================================================*/
......@@ -987,10 +987,10 @@ CtrlUCode(pDRXDemodInstance_t demod,
pDRXUCodeInfo_t mcInfo, DRXUCodeAction_t action)
{
DRXStatus_t rc;
u16_t i = 0;
u16_t mcNrOfBlks = 0;
u16_t mcMagicWord = 0;
pu8_t mcData = (pu8_t) (NULL);
u16 i = 0;
u16 mcNrOfBlks = 0;
u16 mcMagicWord = 0;
u8 *mcData = (u8 *) (NULL);
struct i2c_device_addr *devAddr = (struct i2c_device_addr *) (NULL);
devAddr = demod->myI2CDevAddr;
......@@ -1004,9 +1004,9 @@ CtrlUCode(pDRXDemodInstance_t demod,
/* Check data */
mcMagicWord = UCodeRead16(mcData);
mcData += sizeof(u16_t);
mcData += sizeof(u16);
mcNrOfBlks = UCodeRead16(mcData);
mcData += sizeof(u16_t);
mcData += sizeof(u16);
if ((mcMagicWord != DRX_UCODE_MAGIC_WORD) || (mcNrOfBlks == 0)) {
/* wrong endianess or wrong data ? */
......@@ -1025,35 +1025,35 @@ CtrlUCode(pDRXDemodInstance_t demod,
/* Process block header */
blockHdr.addr = UCodeRead32(mcData);
mcData += sizeof(u32_t);
mcData += sizeof(u32);
blockHdr.size = UCodeRead16(mcData);
mcData += sizeof(u16_t);
mcData += sizeof(u16);
blockHdr.flags = UCodeRead16(mcData);
mcData += sizeof(u16_t);
mcData += sizeof(u16);
blockHdr.CRC = UCodeRead16(mcData);
mcData += sizeof(u16_t);
mcData += sizeof(u16);
if (blockHdr.flags & 0x8) {
/* Aux block. Check type */
pu8_t auxblk = mcInfo->mcData + blockHdr.addr;
u16_t auxtype = UCodeRead16(auxblk);
u8 *auxblk = mcInfo->mcData + blockHdr.addr;
u16 auxtype = UCodeRead16(auxblk);
if (DRX_ISMCVERTYPE(auxtype)) {
DRX_SET_MCVERTYPE(demod,
UCodeRead16(auxblk));
auxblk += sizeof(u16_t);
auxblk += sizeof(u16);
DRX_SET_MCDEV(demod,
UCodeRead32(auxblk));
auxblk += sizeof(u32_t);
auxblk += sizeof(u32);
DRX_SET_MCVERSION(demod,
UCodeRead32(auxblk));
auxblk += sizeof(u32_t);
auxblk += sizeof(u32);
DRX_SET_MCPATCH(demod,
UCodeRead32(auxblk));
}
}
/* Next block */
mcData += blockHdr.size * sizeof(u16_t);
mcData += blockHdr.size * sizeof(u16);
}
/* After scanning, validate the microcode.
......@@ -1065,23 +1065,23 @@ CtrlUCode(pDRXDemodInstance_t demod,
}
/* Restore data pointer */
mcData = mcInfo->mcData + 2 * sizeof(u16_t);
mcData = mcInfo->mcData + 2 * sizeof(u16);
}
/* Process microcode blocks */
for (i = 0; i < mcNrOfBlks; i++) {
DRXUCodeBlockHdr_t blockHdr;
u16_t mcBlockNrBytes = 0;
u16 mcBlockNrBytes = 0;
/* Process block header */
blockHdr.addr = UCodeRead32(mcData);
mcData += sizeof(u32_t);
mcData += sizeof(u32);
blockHdr.size = UCodeRead16(mcData);
mcData += sizeof(u16_t);
mcData += sizeof(u16);
blockHdr.flags = UCodeRead16(mcData);
mcData += sizeof(u16_t);
mcData += sizeof(u16);
blockHdr.CRC = UCodeRead16(mcData);
mcData += sizeof(u16_t);
mcData += sizeof(u16);
/* Check block header on:
- data larger than 64Kb
......@@ -1095,7 +1095,7 @@ CtrlUCode(pDRXDemodInstance_t demod,
return DRX_STS_INVALID_ARG;
}
mcBlockNrBytes = blockHdr.size * ((u16_t) sizeof(u16_t));
mcBlockNrBytes = blockHdr.size * ((u16) sizeof(u16));
if (blockHdr.size != 0) {
/* Perform the desired action */
......@@ -1120,12 +1120,12 @@ CtrlUCode(pDRXDemodInstance_t demod,
case UCODE_VERIFY:
{
int result = 0;
u8_t mcDataBuffer
u8 mcDataBuffer
[DRX_UCODE_MAX_BUF_SIZE];
u32_t bytesToCompare = 0;
u32_t bytesLeftToCompare = 0;
u32 bytesToCompare = 0;
u32 bytesLeftToCompare = 0;
DRXaddr_t currAddr = (DRXaddr_t) 0;
pu8_t currPtr = NULL;
u8 *currPtr = NULL;
bytesLeftToCompare = mcBlockNrBytes;
currAddr = blockHdr.addr;
......@@ -1133,10 +1133,10 @@ CtrlUCode(pDRXDemodInstance_t demod,
while (bytesLeftToCompare != 0) {
if (bytesLeftToCompare >
((u32_t)
((u32)
DRX_UCODE_MAX_BUF_SIZE)) {
bytesToCompare =
((u32_t)
((u32)
DRX_UCODE_MAX_BUF_SIZE);
} else {
bytesToCompare =
......@@ -1146,9 +1146,9 @@ CtrlUCode(pDRXDemodInstance_t demod,
if (demod->myAccessFunct->
readBlockFunc(devAddr,
currAddr,
(u16_t)
(u16)
bytesToCompare,
(pu8_t)
(u8 *)
mcDataBuffer,
0x0000) !=
DRX_STS_OK) {
......@@ -1170,7 +1170,7 @@ CtrlUCode(pDRXDemodInstance_t demod,
currPtr =
&(currPtr[bytesToCompare]);
bytesLeftToCompare -=
((u32_t) bytesToCompare);
((u32) bytesToCompare);
} /* while( bytesToCompare > DRX_UCODE_MAX_BUF_SIZE ) */
};
break;
......@@ -1464,7 +1464,7 @@ DRX_Ctrl(pDRXDemodInstance_t demod, DRXCtrlIndex_t ctrl, void *ctrlData)
/*===================================================================*/
case DRX_CTRL_SCAN_NEXT:
{
return CtrlScanNext(demod, (pu16_t) ctrlData);
return CtrlScanNext(demod, (u16 *) ctrlData);
}
break;
......
drivers/media/dvb-frontends/drx39xyj/drx_driver.h
View file @ 43a431e4
......@@ -262,20 +262,20 @@ MACROS
* The macro takes care of the required byte order in a 16 bits word.
* x->lowbyte(x), highbyte(x)
*/
#define DRX_16TO8( x ) ((u8_t) (((u16_t)x) &0xFF)), \
((u8_t)((((u16_t)x)>>8)&0xFF))
#define DRX_16TO8( x ) ((u8) (((u16)x) &0xFF)), \
((u8)((((u16)x)>>8)&0xFF))
/**
* \brief Macro to sign extend signed 9 bit value to signed 16 bit value
*/
#define DRX_S9TOS16(x) ((((u16_t)x)&0x100 )?((s16_t)((u16_t)(x)|0xFF00)):(x))
#define DRX_S9TOS16(x) ((((u16)x)&0x100 )?((s16)((u16)(x)|0xFF00)):(x))
/**
* \brief Macro to sign extend signed 9 bit value to signed 16 bit value
*/
#define DRX_S24TODRXFREQ(x) ( ( ( (u32_t) x ) & 0x00800000UL ) ? \
#define DRX_S24TODRXFREQ(x) ( ( ( (u32) x ) & 0x00800000UL ) ? \
( (DRXFrequency_t) \
( ( (u32_t) x ) | 0xFF000000 ) ) : \
( ( (u32) x ) | 0xFF000000 ) ) : \
( (DRXFrequency_t) x ) )
/**
......@@ -283,7 +283,7 @@ MACROS
*/
#define DRX_U16TODRXFREQ(x) ( ( x & 0x8000 ) ? \
( (DRXFrequency_t) \
( ( (u32_t) x ) | 0xFFFF0000 ) ) : \
( ( (u32) x ) | 0xFFFF0000 ) ) : \
( (DRXFrequency_t) x ) )
/*-------------------------------------------------------------------------
......@@ -579,7 +579,7 @@ ENUM
* \enum DRXCtrlIndex_t
* \brief Indices of the control functions.
*/
typedef u32_t DRXCtrlIndex_t, *pDRXCtrlIndex_t;
typedef u32 DRXCtrlIndex_t, *pDRXCtrlIndex_t;
#ifndef DRX_CTRL_BASE
#define DRX_CTRL_BASE ((DRXCtrlIndex_t)0)
......@@ -781,7 +781,7 @@ STRUCTS
* \enum DRXCfgType_t
* \brief Generic configuration function identifiers.
*/
typedef u32_t DRXCfgType_t, *pDRXCfgType_t;
typedef u32 DRXCfgType_t, *pDRXCfgType_t;
#ifndef DRX_CFG_BASE
#define DRX_CFG_BASE ((DRXCfgType_t)0)
......@@ -821,9 +821,9 @@ STRUCTS
* Used by DRX_CTRL_LOAD_UCODE and DRX_CTRL_VERIFY_UCODE
*/
typedef struct {
pu8_t mcData;
u8 *mcData;
/**< Pointer to microcode image. */
u16_t mcSize;
u16 mcSize;
/**< Microcode image size. */
} DRXUCodeInfo_t, *pDRXUCodeInfo_t;
......@@ -847,10 +847,10 @@ STRUCTS
#define AUX_VER_RECORD 0x8000
typedef struct {
u16_t auxType; /* type of aux data - 0x8000 for version record */
u32_t mcDevType; /* device type, based on JTAG ID */
u32_t mcVersion; /* version of microcode */
u32_t mcBaseVersion; /* in case of patch: the original microcode version */
u16 auxType; /* type of aux data - 0x8000 for version record */
u32 mcDevType; /* device type, based on JTAG ID */
u32 mcVersion; /* version of microcode */
u32 mcBaseVersion; /* in case of patch: the original microcode version */
} DRXMcVersionRec_t, *pDRXMcVersionRec_t;
/*========================================*/
......@@ -862,13 +862,13 @@ STRUCTS
* Used by DRX_CTRL_LOAD_FILTER
*/
typedef struct {
pu8_t dataRe;
u8 *dataRe;
/**< pointer to coefficients for RE */
pu8_t dataIm;
u8 *dataIm;
/**< pointer to coefficients for IM */
u16_t sizeRe;
u16 sizeRe;
/**< size of coefficients for RE */
u16_t sizeIm;
u16 sizeIm;
/**< size of coefficients for IM */
} DRXFilterInfo_t, *pDRXFilterInfo_t;
......@@ -918,21 +918,21 @@ STRUCTS
* Used by DRX_CTRL_SIG_QUALITY.
*/
typedef struct {
u16_t MER; /**< in steps of 0.1 dB */
u32_t preViterbiBER;
u16 MER; /**< in steps of 0.1 dB */
u32 preViterbiBER;
/**< in steps of 1/scaleFactorBER */
u32_t postViterbiBER;
u32 postViterbiBER;
/**< in steps of 1/scaleFactorBER */
u32_t scaleFactorBER;
u32 scaleFactorBER;
/**< scale factor for BER */
u16_t packetError;
u16 packetError;
/**< number of packet errors */
u32_t postReedSolomonBER;
u32 postReedSolomonBER;
/**< in steps of 1/scaleFactorBER */
u32_t preLdpcBER;
u32 preLdpcBER;
/**< in steps of 1/scaleFactorBER */
u32_t averIter;/**< in steps of 0.01 */
u16_t indicator;
u32 averIter;/**< in steps of 0.01 */
u16 indicator;
/**< indicative signal quality low=0..100=high */
} DRXSigQuality_t, *pDRXSigQuality_t;
......@@ -952,9 +952,9 @@ STRUCTS
* Used by DRX_CTRL_CONSTEL.
*/
typedef struct {
s16_t im;
s16 im;
/**< Imaginary part. */
s16_t re;
s16 re;
/**< Real part. */
} DRXComplex_t, *pDRXComplex_t;
......@@ -975,7 +975,7 @@ STRUCTS
/**< Stepping frequency in this band */
DRXBandwidth_t bandwidth;
/**< Bandwidth within this frequency band */
u16_t chNumber;
u16 chNumber;
/**< First channel number in this band, or first
index in chNames */
char **chNames;
......@@ -1004,12 +1004,12 @@ STRUCTS
* QAM specific scanning variables
*/
typedef struct {
pu32_t symbolrate; /**< list of symbolrates to scan */
u16_t symbolrateSize; /**< size of symbolrate array */
u32 *symbolrate; /**< list of symbolrates to scan */
u16 symbolrateSize; /**< size of symbolrate array */
pDRXConstellation_t constellation;
/**< list of constellations */
u16_t constellationSize; /**< size of constellation array */
u16_t ifAgcThreshold; /**< thresholf for IF-AGC based
u16 constellationSize; /**< size of constellation array */
u16 ifAgcThreshold; /**< thresholf for IF-AGC based
scanning filter */
} DRXScanDataQam_t, *pDRXScanDataQam_t;
......@@ -1020,7 +1020,7 @@ STRUCTS
* ATV specific scanning variables
*/
typedef struct {
s16_t svrThreshold;
s16 svrThreshold;
/**< threshold of Sound/Video ratio in 0.1dB steps */
} DRXScanDataAtv_t, *pDRXScanDataAtv_t;
......@@ -1035,8 +1035,8 @@ STRUCTS
typedef struct {
pDRXFrequencyPlan_t frequencyPlan;
/**< Frequency plan (array)*/
u16_t frequencyPlanSize; /**< Number of bands */
u32_t numTries; /**< Max channels tried */
u16 frequencyPlanSize; /**< Number of bands */
u32 numTries; /**< Max channels tried */
DRXFrequency_t skip; /**< Minimum frequency step to take
after a channel is found */
void *extParams; /**< Standard specific params */
......@@ -1084,8 +1084,8 @@ STRUCTS
DRXCoderate_t lowCoderate;
/**< Low cod rate */
DRXTPSFrame_t frame; /**< Tps frame */
u8_t length; /**< Length */
u16_t cellId; /**< Cell id */
u8 length; /**< Length */
u16 cellId; /**< Cell id */
} DRXTPSInfo_t, *pDRXTPSInfo_t;
/*========================================*/
......@@ -1166,9 +1166,9 @@ STRUCTS
/**< Type identifier of the module */
char *moduleName;
/**< Name or description of module */
u16_t vMajor; /**< Major version number */
u16_t vMinor; /**< Minor version number */
u16_t vPatch; /**< Patch version number */
u16 vMajor; /**< Major version number */
u16 vMinor; /**< Minor version number */
u16 vPatch; /**< Patch version number */
char *vString; /**< Version as text string */
} DRXVersion_t, *pDRXVersion_t;
......@@ -1237,8 +1237,8 @@ STRUCTS
typedef struct {
DRXFrequency_t frequency; /**< Frequency in Khz */
DRXLockStatus_t lock; /**< Lock status */
u32_t mer; /**< MER */
s32_t symbolRateOffset; /**< Symbolrate offset in ppm */
u32 mer; /**< MER */
s32 symbolRateOffset; /**< Symbolrate offset in ppm */
} DRXOOBStatus_t, *pDRXOOBStatus_t;
/*========================================*/
......@@ -1291,7 +1291,7 @@ STRUCTS
will be used, otherwise clockrate
will adapt to the bitrate of the
TS */
u32_t bitrate; /**< Maximum bitrate in b/s in case
u32 bitrate; /**< Maximum bitrate in b/s in case
static clockrate is selected */
DRXMPEGStrWidth_t widthSTR;
/**< MPEG start width */
......@@ -1313,7 +1313,7 @@ STRUCTS
*/
typedef struct {
DRXCfgSMAIO_t io;
u16_t ctrlData;
u16 ctrlData;
Bool_t smartAntInverted;
} DRXCfgSMA_t, *pDRXCfgSMA_t;
......@@ -1328,15 +1328,15 @@ STRUCTS
*
*/
typedef struct {
u16_t portNr; /**< I2C port number */
u16 portNr; /**< I2C port number */
struct i2c_device_addr *wDevAddr;
/**< Write device address */
u16_t wCount; /**< Size of write data in bytes */
pu8_t wData; /**< Pointer to write data */
u16 wCount; /**< Size of write data in bytes */
u8 *wData; /**< Pointer to write data */
struct i2c_device_addr *rDevAddr;
/**< Read device address */
u16_t rCount; /**< Size of data to read in bytes */
pu8_t rData; /**< Pointer to read buffer */
u16 rCount; /**< Size of data to read in bytes */
u8 *rData; /**< Pointer to read buffer */
} DRXI2CData_t, *pDRXI2CData_t;
/*========================================*/
......@@ -1398,7 +1398,7 @@ STRUCTS
Bool_t rds; /**< RDS data array present */
DRXAudNICAMStatus_t nicamStatus;
/**< status of NICAM carrier */
s8_t fmIdent; /**< FM Identification value */
s8 fmIdent; /**< FM Identification value */
} DRXAudStatus_t, *pDRXAudStatus_t;
/* CTRL_AUD_READ_RDS - DRXRDSdata_t */
......@@ -1409,7 +1409,7 @@ STRUCTS
*/
typedef struct {
Bool_t valid; /**< RDS data validation */
u16_t data[18]; /**< data from one RDS data array */
u16 data[18]; /**< data from one RDS data array */
} DRXCfgAudRDS_t, *pDRXCfgAudRDS_t;
/* DRX_CFG_AUD_VOLUME - DRXCfgAudVolume_t - set/get */
......@@ -1452,15 +1452,15 @@ STRUCTS
*/
typedef struct {
Bool_t mute; /**< mute overrides volume setting */
s16_t volume; /**< volume, range -114 to 12 dB */
s16 volume; /**< volume, range -114 to 12 dB */
DRXAudAVCMode_t avcMode; /**< AVC auto volume control mode */
u16_t avcRefLevel; /**< AVC reference level */
u16 avcRefLevel; /**< AVC reference level */
DRXAudAVCMaxGain_t avcMaxGain;
/**< AVC max gain selection */
DRXAudAVCMaxAtten_t avcMaxAtten;
/**< AVC max attenuation selection */
s16_t strengthLeft; /**< quasi-peak, left speaker */
s16_t strengthRight; /**< quasi-peak, right speaker */
s16 strengthLeft; /**< quasi-peak, left speaker */
s16 strengthRight; /**< quasi-peak, right speaker */
} DRXCfgAudVolume_t, *pDRXCfgAudVolume_t;
/* DRX_CFG_I2S_OUTPUT - DRXCfgI2SOutput_t - set/get */
......@@ -1508,7 +1508,7 @@ STRUCTS
*/
typedef struct {
Bool_t outputEnable; /**< I2S output enable */
u32_t frequency; /**< range from 8000-48000 Hz */
u32 frequency; /**< range from 8000-48000 Hz */
DRXI2SMode_t mode; /**< I2S mode, master or slave */
DRXI2SWordLength_t wordLength;
/**< I2S wordlength, 16 or 32 bits */
......@@ -1563,9 +1563,9 @@ STRUCTS
* \brief Automatic Sound Select Thresholds
*/
typedef struct {
u16_t a2; /* A2 Threshold for ASS configuration */
u16_t btsc; /* BTSC Threshold for ASS configuration */
u16_t nicam; /* Nicam Threshold for ASS configuration */
u16 a2; /* A2 Threshold for ASS configuration */
u16 btsc; /* BTSC Threshold for ASS configuration */
u16 nicam; /* Nicam Threshold for ASS configuration */
} DRXCfgAudASSThres_t, *pDRXCfgAudASSThres_t;
/**
......@@ -1573,7 +1573,7 @@ STRUCTS
* \brief Carrier detection related parameters
*/
typedef struct {
u16_t thres; /* carrier detetcion threshold for primary carrier (A) */
u16 thres; /* carrier detetcion threshold for primary carrier (A) */
DRXNoCarrierOption_t opt; /* Mute or noise at no carrier detection (A) */
DRXFrequency_t shift; /* DC level of incoming signal (A) */
DRXFrequency_t dco; /* frequency adjustment (A) */
......@@ -1657,8 +1657,8 @@ STRUCTS
* \brief Prescalers
*/
typedef struct {
u16_t fmDeviation;
s16_t nicamGain;
u16 fmDeviation;
s16 nicamGain;
} DRXCfgAudPrescale_t, *pDRXCfgAudPrescale_t;
/**
......@@ -1666,8 +1666,8 @@ STRUCTS
* \brief Beep
*/
typedef struct {
s16_t volume; /* dB */
u16_t frequency; /* Hz */
s16 volume; /* dB */
u16 frequency; /* Hz */
Bool_t mute;
} DRXAudBeep_t, *pDRXAudBeep_t;
......@@ -1700,7 +1700,7 @@ STRUCTS
DRXAudFMDeemphasis_t deemph;
DRXAudBtscDetect_t btscDetect;
/* rds */
u16_t rdsDataCounter;
u16 rdsDataCounter;
Bool_t rdsDataPresent;
} DRXAudData_t, *pDRXAudData_t;
......@@ -1720,81 +1720,81 @@ STRUCTS
/*============================================================================*/
/* Address on device */
typedef u32_t DRXaddr_t, *pDRXaddr_t;
typedef u32 DRXaddr_t, *pDRXaddr_t;
/* Protocol specific flags */
typedef u32_t DRXflags_t, *pDRXflags_t;
typedef u32 DRXflags_t, *pDRXflags_t;
/* Write block of data to device */
typedef DRXStatus_t(*DRXWriteBlockFunc_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16_t datasize, /* size of data in bytes */
pu8_t data, /* data to send */
u16 datasize, /* size of data in bytes */
u8 *data, /* data to send */
DRXflags_t flags);
/* Read block of data from device */
typedef DRXStatus_t(*DRXReadBlockFunc_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16_t datasize, /* size of data in bytes */
pu8_t data, /* receive buffer */
u16 datasize, /* size of data in bytes */
u8 *data, /* receive buffer */
DRXflags_t flags);
/* Write 8-bits value to device */
typedef DRXStatus_t(*DRXWriteReg8Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u8_t data, /* data to send */
u8 data, /* data to send */
DRXflags_t flags);
/* Read 8-bits value to device */
typedef DRXStatus_t(*DRXReadReg8Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
pu8_t data, /* receive buffer */
u8 *data, /* receive buffer */
DRXflags_t flags);
/* Read modify write 8-bits value to device */
typedef DRXStatus_t(*DRXReadModifyWriteReg8Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* write address of register */
DRXaddr_t raddr, /* read address of register */
u8_t wdata, /* data to write */
pu8_t rdata); /* data to read */
u8 wdata, /* data to write */
u8 *rdata); /* data to read */
/* Write 16-bits value to device */
typedef DRXStatus_t(*DRXWriteReg16Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16_t data, /* data to send */
u16 data, /* data to send */
DRXflags_t flags);
/* Read 16-bits value to device */
typedef DRXStatus_t(*DRXReadReg16Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
pu16_t data, /* receive buffer */
u16 *data, /* receive buffer */
DRXflags_t flags);
/* Read modify write 16-bits value to device */
typedef DRXStatus_t(*DRXReadModifyWriteReg16Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* write address of register */
DRXaddr_t raddr, /* read address of register */
u16_t wdata, /* data to write */
pu16_t rdata); /* data to read */
u16 wdata, /* data to write */
u16 *rdata); /* data to read */
/* Write 32-bits value to device */
typedef DRXStatus_t(*DRXWriteReg32Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u32_t data, /* data to send */
u32 data, /* data to send */
DRXflags_t flags);
/* Read 32-bits value to device */
typedef DRXStatus_t(*DRXReadReg32Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
pu32_t data, /* receive buffer */
u32 *data, /* receive buffer */
DRXflags_t flags);
/* Read modify write 32-bits value to device */
typedef DRXStatus_t(*DRXReadModifyWriteReg32Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* write address of register */
DRXaddr_t raddr, /* read address of register */
u32_t wdata, /* data to write */
pu32_t rdata); /* data to read */
u32 wdata, /* data to write */
u32 *rdata); /* data to read */
/**
* \struct DRXAccessFunc_t
......@@ -1819,7 +1819,7 @@ STRUCTS
typedef struct {
DRXaddr_t address;
u32_t data;
u32 data;
} DRXRegDump_t, *pDRXRegDump_t;
......@@ -1835,8 +1835,8 @@ STRUCTS
*/
typedef struct {
/* Microcode (firmware) attributes */
pu8_t microcode; /**< Pointer to microcode image. */
u16_t microcodeSize;
u8 *microcode; /**< Pointer to microcode image. */
u16 microcodeSize;
/**< Size of microcode image in bytes. */
Bool_t verifyMicrocode;
/**< Use microcode verify or not. */
......@@ -1850,7 +1850,7 @@ STRUCTS
/**< Systemclock frequency. (kHz) */
DRXFrequency_t oscClockFreq;
/**< Oscillator clock frequency. (kHz) */
s16_t oscClockDeviation;
s16 oscClockDeviation;
/**< Oscillator clock deviation. (ppm) */
Bool_t mirrorFreqSpect;
/**< Mirror IF frequency spectrum or not.*/
......@@ -1864,13 +1864,13 @@ STRUCTS
/* Channel scan */
pDRXScanParam_t scanParam;
/**< scan parameters */
u16_t scanFreqPlanIndex;
u16 scanFreqPlanIndex;
/**< next index in freq plan */
DRXFrequency_t scanNextFrequency;
/**< next freq to scan */
Bool_t scanReady; /**< scan ready flag */
u32_t scanMaxChannels;/**< number of channels in freqplan */
u32_t scanChannelsScanned;
u32 scanMaxChannels;/**< number of channels in freqplan */
u32 scanChannelsScanned;
/**< number of channels scanned */
/* Channel scan - inner loop: demod related */
DRXScanFunc_t scanFunction;
......@@ -1878,7 +1878,7 @@ STRUCTS
/* Channel scan - inner loop: SYSObj related */
void *scanContext; /**< Context Pointer of SYSObj */
/* Channel scan - parameters for default DTV scan function in core driver */
u16_t scanDemodLockTimeout;
u16 scanDemodLockTimeout;
/**< millisecs to wait for lock */
DRXLockStatus_t scanDesiredLock;
/**< lock requirement for channel found */
......@@ -1891,7 +1891,7 @@ STRUCTS
/**< current power management mode */
/* Tuner */
u8_t tunerPortNr; /**< nr of I2C port to wich tuner is */
u8 tunerPortNr; /**< nr of I2C port to wich tuner is */
DRXFrequency_t tunerMinFreqRF;
/**< minimum RF input frequency, in kHz */
DRXFrequency_t tunerMaxFreqRF;
......@@ -1909,8 +1909,8 @@ STRUCTS
DRXStandard_t diCacheStandard;
/**< standard in DI cache if available */
Bool_t useBootloader; /**< use bootloader in open */
u32_t capabilities; /**< capabilities flags */
u32_t productId; /**< product ID inc. metal fix number */
u32 capabilities; /**< capabilities flags */
u32 productId; /**< product ID inc. metal fix number */
} DRXCommonAttr_t, *pDRXCommonAttr_t;
......@@ -1930,7 +1930,7 @@ STRUCTS
* \brief A stucture containing all functions of a demodulator.
*/
typedef struct {
u32_t typeId; /**< Device type identifier. */
u32 typeId; /**< Device type identifier. */
DRXOpenFunc_t openFunc; /**< Pointer to Open() function. */
DRXCloseFunc_t closeFunc;/**< Pointer to Close() function. */
DRXCtrlFunc_t ctrlFunc; /**< Pointer to Ctrl() function. */
......
drivers/media/dvb-frontends/drx39xyj/drxj.c
View file @ 43a431e4
This source diff could not be displayed because it is too large. You can view the blob instead.
drivers/media/dvb-frontends/drx39xyj/drxj.h
View file @ 43a431e4
......@@ -75,15 +75,15 @@ TYPEDEFS
/*============================================================================*/
typedef struct {
u16_t command;
u16 command;
/**< Command number */
u16_t parameterLen;
u16 parameterLen;
/**< Data length in byte */
u16_t resultLen;
u16 resultLen;
/**< result length in byte */
u16_t *parameter;
u16 *parameter;
/**< General purpous param */
u16_t *result;
u16 *result;
/**< General purpous param */
} DRXJSCUCmd_t, *pDRXJSCUCmd_t;
......@@ -154,7 +154,7 @@ TYPEDEFS
*/
typedef struct {
DRXJCfgSmartAntIO_t io;
u16_t ctrlData;
u16 ctrlData;
} DRXJCfgSmartAnt_t, *pDRXJCfgSmartAnt_t;
/**
......@@ -162,9 +162,9 @@ TYPEDEFS
* AGC status information from the DRXJ-IQM-AF.
*/
typedef struct {
u16_t IFAGC;
u16_t RFAGC;
u16_t DigitalAGC;
u16 IFAGC;
u16 RFAGC;
u16 DigitalAGC;
} DRXJAgcStatus_t, *pDRXJAgcStatus_t;
/* DRXJ_CFG_AGC_RF, DRXJ_CFG_AGC_IF */
......@@ -186,12 +186,12 @@ TYPEDEFS
typedef struct {
DRXStandard_t standard; /* standard for which these settings apply */
DRXJAgcCtrlMode_t ctrlMode; /* off, user, auto */
u16_t outputLevel; /* range dependent on AGC */
u16_t minOutputLevel; /* range dependent on AGC */
u16_t maxOutputLevel; /* range dependent on AGC */
u16_t speed; /* range dependent on AGC */
u16_t top; /* rf-agc take over point */
u16_t cutOffCurrent; /* rf-agc is accelerated if output current
u16 outputLevel; /* range dependent on AGC */
u16 minOutputLevel; /* range dependent on AGC */
u16 maxOutputLevel; /* range dependent on AGC */
u16 speed; /* range dependent on AGC */
u16 top; /* rf-agc take over point */
u16 cutOffCurrent; /* rf-agc is accelerated if output current
is below cut-off current */
} DRXJCfgAgc_t, *pDRXJCfgAgc_t;
......@@ -203,7 +203,7 @@ TYPEDEFS
*/
typedef struct {
DRXStandard_t standard; /* standard to which these settings apply */
u16_t reference; /* pre SAW reference value, range 0 .. 31 */
u16 reference; /* pre SAW reference value, range 0 .. 31 */
Bool_t usePreSaw; /* TRUE algorithms must use pre SAW sense */
} DRXJCfgPreSaw_t, *pDRXJCfgPreSaw_t;
......@@ -215,7 +215,7 @@ TYPEDEFS
*/
typedef struct {
DRXStandard_t standard; /* standard to which these settings apply */
u16_t gain; /* gain in 0.1 dB steps, DRXJ range 140 .. 335 */
u16 gain; /* gain in 0.1 dB steps, DRXJ range 140 .. 335 */
} DRXJCfgAfeGain_t, *pDRXJCfgAfeGain_t;
/**
......@@ -226,15 +226,15 @@ TYPEDEFS
*
*/
typedef struct {
u16_t nrBitErrors;
u16 nrBitErrors;
/**< no of pre RS bit errors */
u16_t nrSymbolErrors;
u16 nrSymbolErrors;
/**< no of pre RS symbol errors */
u16_t nrPacketErrors;
u16 nrPacketErrors;
/**< no of pre RS packet errors */
u16_t nrFailures;
u16 nrFailures;
/**< no of post RS failures to decode */
u16_t nrSncParFailCount;
u16 nrSncParFailCount;
/**< no of post RS bit erros */
} DRXJRSErrors_t, *pDRXJRSErrors_t;
......@@ -243,7 +243,7 @@ TYPEDEFS
* symbol error rate
*/
typedef struct {
u32_t symbError;
u32 symbError;
/**< symbol error rate sps */
} DRXJCfgVSBMisc_t, *pDRXJCfgVSBMisc_t;
......@@ -321,8 +321,8 @@ TYPEDEFS
* DRXJ_CFG_ATV_MISC
*/
typedef struct {
s16_t peakFilter; /* -8 .. 15 */
u16_t noiseFilter; /* 0 .. 15 */
s16 peakFilter; /* -8 .. 15 */
u16 noiseFilter; /* 0 .. 15 */
} DRXJCfgAtvMisc_t, *pDRXJCfgAtvMisc_t;
/*
......@@ -347,7 +347,7 @@ TYPEDEFS
Bool_t freqLock;
Bool_t digGainLock;
Bool_t anaGainLock;
u8_t state;
u8 state;
} DRXJCfgOOBMisc_t, *pDRXJCfgOOBMisc_t;
/*
......@@ -365,10 +365,10 @@ TYPEDEFS
* DRXJ_CFG_ATV_EQU_COEF
*/
typedef struct {
s16_t coef0; /* -256 .. 255 */
s16_t coef1; /* -256 .. 255 */
s16_t coef2; /* -256 .. 255 */
s16_t coef3; /* -256 .. 255 */
s16 coef0; /* -256 .. 255 */
s16 coef1; /* -256 .. 255 */
s16 coef2; /* -256 .. 255 */
s16 coef3; /* -256 .. 255 */
} DRXJCfgAtvEquCoef_t, *pDRXJCfgAtvEquCoef_t;
/*
......@@ -417,13 +417,13 @@ TYPEDEFS
*/
/* TODO : AFE interface not yet finished, subject to change */
typedef struct {
u16_t rfAgcGain; /* 0 .. 877 uA */
u16_t ifAgcGain; /* 0 .. 877 uA */
s16_t videoAgcGain; /* -75 .. 1972 in 0.1 dB steps */
s16_t audioAgcGain; /* -4 .. 1020 in 0.1 dB steps */
u16_t rfAgcLoopGain; /* 0 .. 7 */
u16_t ifAgcLoopGain; /* 0 .. 7 */
u16_t videoAgcLoopGain; /* 0 .. 7 */
u16 rfAgcGain; /* 0 .. 877 uA */
u16 ifAgcGain; /* 0 .. 877 uA */
s16 videoAgcGain; /* -75 .. 1972 in 0.1 dB steps */
s16 audioAgcGain; /* -4 .. 1020 in 0.1 dB steps */
u16 rfAgcLoopGain; /* 0 .. 7 */
u16 ifAgcLoopGain; /* 0 .. 7 */
u16 videoAgcLoopGain; /* 0 .. 7 */
} DRXJCfgAtvAgcStatus_t, *pDRXJCfgAtvAgcStatus_t;
/*============================================================================*/
......@@ -456,7 +456,7 @@ TYPEDEFS
Bool_t hasGPIO; /**< TRUE if GPIO is available */
Bool_t hasIRQN; /**< TRUE if IRQN is available */
/* A1/A2/A... */
u8_t mfx; /**< metal fix */
u8 mfx; /**< metal fix */
/* tuner settings */
Bool_t mirrorFreqSpectOOB;/**< tuner inversion (TRUE = tuner mirrors the signal */
......@@ -471,22 +471,22 @@ TYPEDEFS
DRXMirror_t mirror; /**< current channel mirror */
/* signal quality information */
u32_t fecBitsDesired; /**< BER accounting period */
u16_t fecVdPlen; /**< no of trellis symbols: VD SER measurement period */
u16_t qamVdPrescale; /**< Viterbi Measurement Prescale */
u16_t qamVdPeriod; /**< Viterbi Measurement period */
u16_t fecRsPlen; /**< defines RS BER measurement period */
u16_t fecRsPrescale; /**< ReedSolomon Measurement Prescale */
u16_t fecRsPeriod; /**< ReedSolomon Measurement period */
u32 fecBitsDesired; /**< BER accounting period */
u16 fecVdPlen; /**< no of trellis symbols: VD SER measurement period */
u16 qamVdPrescale; /**< Viterbi Measurement Prescale */
u16 qamVdPeriod; /**< Viterbi Measurement period */
u16 fecRsPlen; /**< defines RS BER measurement period */
u16 fecRsPrescale; /**< ReedSolomon Measurement Prescale */
u16 fecRsPeriod; /**< ReedSolomon Measurement period */
Bool_t resetPktErrAcc; /**< Set a flag to reset accumulated packet error */
u16_t pktErrAccStart; /**< Set a flag to reset accumulated packet error */
u16 pktErrAccStart; /**< Set a flag to reset accumulated packet error */
/* HI configuration */
u16_t HICfgTimingDiv; /**< HI Configure() parameter 2 */
u16_t HICfgBridgeDelay; /**< HI Configure() parameter 3 */
u16_t HICfgWakeUpKey; /**< HI Configure() parameter 4 */
u16_t HICfgCtrl; /**< HI Configure() parameter 5 */
u16_t HICfgTransmit; /**< HI Configure() parameter 6 */
u16 HICfgTimingDiv; /**< HI Configure() parameter 2 */
u16 HICfgBridgeDelay; /**< HI Configure() parameter 3 */
u16 HICfgWakeUpKey; /**< HI Configure() parameter 4 */
u16 HICfgCtrl; /**< HI Configure() parameter 5 */
u16 HICfgTransmit; /**< HI Configure() parameter 6 */
/* UIO configuartion */
DRXUIOMode_t uioSmaRxMode;/**< current mode of SmaRx pin */
......@@ -495,20 +495,20 @@ TYPEDEFS
DRXUIOMode_t uioIRQNMode; /**< current mode of IRQN pin */
/* IQM fs frequecy shift and inversion */
u32_t iqmFsRateOfs; /**< frequency shifter setting after setchannel */
u32 iqmFsRateOfs; /**< frequency shifter setting after setchannel */
Bool_t posImage; /**< Ture: positive image */
/* IQM RC frequecy shift */
u32_t iqmRcRateOfs; /**< frequency shifter setting after setchannel */
u32 iqmRcRateOfs; /**< frequency shifter setting after setchannel */
/* ATV configuartion */
u32_t atvCfgChangedFlags; /**< flag: flags cfg changes */
s16_t atvTopEqu0[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU0__A */
s16_t atvTopEqu1[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU1__A */
s16_t atvTopEqu2[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU2__A */
s16_t atvTopEqu3[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU3__A */
u32 atvCfgChangedFlags; /**< flag: flags cfg changes */
s16 atvTopEqu0[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU0__A */
s16 atvTopEqu1[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU1__A */
s16 atvTopEqu2[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU2__A */
s16 atvTopEqu3[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU3__A */
Bool_t phaseCorrectionBypass;/**< flag: TRUE=bypass */
s16_t atvTopVidPeak; /**< shadow of ATV_TOP_VID_PEAK__A */
u16_t atvTopNoiseTh; /**< shadow of ATV_TOP_NOISE_TH__A */
s16 atvTopVidPeak; /**< shadow of ATV_TOP_VID_PEAK__A */
u16 atvTopNoiseTh; /**< shadow of ATV_TOP_NOISE_TH__A */
Bool_t enableCVBSOutput; /**< flag CVBS ouput enable */
Bool_t enableSIFOutput; /**< flag SIF ouput enable */
DRXJSIFAttenuation_t sifAttenuation;
......@@ -520,8 +520,8 @@ TYPEDEFS
DRXJCfgAgc_t vsbIfAgcCfg; /**< vsb IF AGC config */
/* PGA gain configuration for QAM and VSB */
u16_t qamPgaCfg; /**< qam PGA config */
u16_t vsbPgaCfg; /**< vsb PGA config */
u16 qamPgaCfg; /**< qam PGA config */
u16 vsbPgaCfg; /**< vsb PGA config */
/* Pre SAW configuration for QAM and VSB */
DRXJCfgPreSaw_t qamPreSawCfg;
......@@ -539,11 +539,11 @@ TYPEDEFS
Bool_t smartAntInverted;
/* Tracking filter setting for OOB */
u16_t oobTrkFilterCfg[8];
u16 oobTrkFilterCfg[8];
Bool_t oobPowerOn;
/* MPEG static bitrate setting */
u32_t mpegTsStaticBitrate; /**< bitrate static MPEG output */
u32 mpegTsStaticBitrate; /**< bitrate static MPEG output */
Bool_t disableTEIhandling; /**< MPEG TS TEI handling */
Bool_t bitReverseMpegOutout;/**< MPEG output bit order */
DRXJMpegOutputClockRate_t mpegOutputClockRate;
......@@ -556,19 +556,19 @@ TYPEDEFS
/**< atv pre SAW config */
DRXJCfgAgc_t atvRfAgcCfg; /**< atv RF AGC config */
DRXJCfgAgc_t atvIfAgcCfg; /**< atv IF AGC config */
u16_t atvPgaCfg; /**< atv pga config */
u16 atvPgaCfg; /**< atv pga config */
u32_t currSymbolRate;
u32 currSymbolRate;
/* pin-safe mode */
Bool_t pdrSafeMode; /**< PDR safe mode activated */
u16_t pdrSafeRestoreValGpio;
u16_t pdrSafeRestoreValVSync;
u16_t pdrSafeRestoreValSmaRx;
u16_t pdrSafeRestoreValSmaTx;
u16 pdrSafeRestoreValGpio;
u16 pdrSafeRestoreValVSync;
u16 pdrSafeRestoreValSmaRx;
u16 pdrSafeRestoreValSmaTx;
/* OOB pre-saw value */
u16_t oobPreSaw;
u16 oobPreSaw;
DRXJCfgOobLoPower_t oobLoPow;
DRXAudData_t audData;
......
drivers/media/dvb-frontends/drx39xyj/drxj_mc.h
View file @ 43a431e4
......@@ -41,9 +41,9 @@
#ifndef __DRXJ_MC_MAIN_H__
#define __DRXJ_MC_MAIN_H__
#define DRXJ_MC_MAIN ((pu8_t) drxj_mc_main_g)
#define DRXJ_MC_MAIN ((u8 *) drxj_mc_main_g)
const u8_t drxj_mc_main_g[] = {
const u8 drxj_mc_main_g[] = {
0x48, 0x4c, 0x00, 0x06, 0x00, 0x00, 0xf3, 0x10, 0x00, 0x00, 0x00, 0x08,
0x00, 0x00, 0x01, 0x07,
0x00, 0x00, 0x1f, 0xf0, 0x00, 0x01, 0xdd, 0x81, 0x00, 0x40, 0x0a, 0x00,
......
drivers/media/dvb-frontends/drx39xyj/drxj_mc_vsb.h
View file @ 43a431e4
......@@ -41,9 +41,9 @@
#ifndef __DRXJ_MC_VSB_H__
#define __DRXJ_MC_VSB_H__
#define DRXJ_MC_VSB ((pu8_t) drxj_mc_vsb_g)
#define DRXJ_MC_VSB ((u8 *) drxj_mc_vsb_g)
const u8_t drxj_mc_vsb_g[] = {
const u8 drxj_mc_vsb_g[] = {
0x48, 0x4c, 0x00, 0x03, 0x00, 0x00, 0x2b, 0x62, 0x00, 0x00, 0x00, 0x08,
0x00, 0x00, 0x00, 0x82,
0x00, 0x00, 0x15, 0x9e, 0x00, 0x01, 0x92, 0x3b, 0x2a, 0x02, 0xe4, 0xf8,
......
drivers/media/dvb-frontends/drx39xyj/drxj_mc_vsbqam.h
View file @ 43a431e4
......@@ -42,9 +42,9 @@
#ifndef __DRXJ_MC_VSBQAM_H__
#define __DRXJ_MC_VSBQAM_H__
#define DRXJ_MC_VSBQAM ((pu8_t) drxj_mc_vsbqam_g)
#define DRXJ_MC_VSBQAM ((u8 *) drxj_mc_vsbqam_g)
const u8_t drxj_mc_vsbqam_g[] = {
const u8 drxj_mc_vsbqam_g[] = {
0x48, 0x4c, 0x00, 0x04, 0x00, 0x00, 0x56, 0xa0, 0x00, 0x00, 0x00, 0x08,
0x00, 0x00, 0x00, 0x82,
0x00, 0x00, 0x20, 0x00, 0x00, 0x01, 0xc4, 0x4d, 0x55, 0x02, 0xe4, 0xee,
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7