Commit 49109756 authored by Jani Nikula's avatar Jani Nikula

drm/i915: pass dev_priv explicitly to PRIMSIZE

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PRIMSIZE register macro.
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b672f17b4c3d5ba7ac606798bb3799408c26f075.1716469091.git.jani.nikula@intel.comSigned-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 90fa6a42
...@@ -476,7 +476,7 @@ static void i9xx_plane_update_arm(struct intel_plane *plane, ...@@ -476,7 +476,7 @@ static void i9xx_plane_update_arm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, PRIMPOS(dev_priv, i9xx_plane), intel_de_write_fw(dev_priv, PRIMPOS(dev_priv, i9xx_plane),
PRIM_POS_Y(crtc_y) | PRIM_POS_X(crtc_x)); PRIM_POS_Y(crtc_y) | PRIM_POS_X(crtc_x));
intel_de_write_fw(dev_priv, PRIMSIZE(i9xx_plane), intel_de_write_fw(dev_priv, PRIMSIZE(dev_priv, i9xx_plane),
PRIM_HEIGHT(crtc_h - 1) | PRIM_WIDTH(crtc_w - 1)); PRIM_HEIGHT(crtc_h - 1) | PRIM_WIDTH(crtc_w - 1));
intel_de_write_fw(dev_priv, PRIMCNSTALPHA(i9xx_plane), 0); intel_de_write_fw(dev_priv, PRIMCNSTALPHA(i9xx_plane), 0);
} }
......
...@@ -94,8 +94,8 @@ ...@@ -94,8 +94,8 @@
#define PRIM_POS_X_MASK REG_GENMASK(15, 0) #define PRIM_POS_X_MASK REG_GENMASK(15, 0)
#define PRIM_POS_X(x) REG_FIELD_PREP(PRIM_POS_X_MASK, (x)) #define PRIM_POS_X(x) REG_FIELD_PREP(PRIM_POS_X_MASK, (x))
#define _PRIMSIZE_A 0x60a0c #define _PRIMSIZE_A 0x60a0c
#define PRIMSIZE(plane) _MMIO_TRANS2(dev_priv, plane, _PRIMSIZE_A) #define PRIMSIZE(dev_priv, plane) _MMIO_TRANS2(dev_priv, plane, _PRIMSIZE_A)
#define PRIM_HEIGHT_MASK REG_GENMASK(31, 16) #define PRIM_HEIGHT_MASK REG_GENMASK(31, 16)
#define PRIM_HEIGHT(h) REG_FIELD_PREP(PRIM_HEIGHT_MASK, (h)) #define PRIM_HEIGHT(h) REG_FIELD_PREP(PRIM_HEIGHT_MASK, (h))
#define PRIM_WIDTH_MASK REG_GENMASK(15, 0) #define PRIM_WIDTH_MASK REG_GENMASK(15, 0)
......
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