Commit 503611c8 authored by Imre Deak's avatar Imre Deak

drm/i915/dp_mst: Enable decompression in the sink from the MST encoder hooks

Enable/disable the DSC decompression in the sink/branch from the MST
encoder hooks. This prepares for an upcoming patch toggling DSC for each
stream as needed, but for now keeps the current behavior, as DSC is only
enabled for the first MST stream.

v2:
- Rebased on latest drm-tip.
Reviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231107001505.3370108-5-imre.deak@intel.com
parent 55eaef16
...@@ -2538,7 +2538,9 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state, ...@@ -2538,7 +2538,9 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
intel_dp_set_power(intel_dp, DP_SET_POWER_D0); intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
intel_dp_configure_protocol_converter(intel_dp, crtc_state); intel_dp_configure_protocol_converter(intel_dp, crtc_state);
if (!is_mst)
intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true); intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
/* /*
* DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit * DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit
* in the FEC_CONFIGURATION register to 1 before initiating link * in the FEC_CONFIGURATION register to 1 before initiating link
...@@ -2689,6 +2691,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, ...@@ -2689,6 +2691,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
intel_dp_set_power(intel_dp, DP_SET_POWER_D0); intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
intel_dp_configure_protocol_converter(intel_dp, crtc_state); intel_dp_configure_protocol_converter(intel_dp, crtc_state);
if (!is_mst)
intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true); intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
/* /*
* DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit * DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit
...@@ -2769,6 +2772,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state, ...@@ -2769,6 +2772,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
if (!is_mst) if (!is_mst)
intel_dp_set_power(intel_dp, DP_SET_POWER_D0); intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
intel_dp_configure_protocol_converter(intel_dp, crtc_state); intel_dp_configure_protocol_converter(intel_dp, crtc_state);
if (!is_mst)
intel_dp_sink_set_decompression_state(intel_dp, crtc_state, intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
true); true);
intel_dp_sink_set_fec_ready(intel_dp, crtc_state, true); intel_dp_sink_set_fec_ready(intel_dp, crtc_state, true);
......
...@@ -776,6 +776,13 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state, ...@@ -776,6 +776,13 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
intel_hdcp_disable(intel_mst->connector); intel_hdcp_disable(intel_mst->connector);
intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state); intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
if (intel_dp->active_mst_links == 1) /* last stream ? */
/*
* TODO: disable decompression for all streams/in any MST ports, not
* only in the first downstream branch device.
*/
intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state, false);
} }
static void intel_mst_post_disable_dp(struct intel_atomic_state *state, static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
...@@ -932,9 +939,15 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state, ...@@ -932,9 +939,15 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true); drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
if (first_mst_stream) if (first_mst_stream) {
/*
* TODO: enable decompression for all streams/in any MST ports, not
* only in the first downstream branch device.
*/
intel_dp_sink_set_decompression_state(intel_dp, pipe_config, true);
dig_port->base.pre_enable(state, &dig_port->base, dig_port->base.pre_enable(state, &dig_port->base,
pipe_config, NULL); pipe_config, NULL);
}
intel_dp->active_mst_links++; intel_dp->active_mst_links++;
......
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