Commit 50dc5f5c authored by Mark Brown's avatar Mark Brown

Merge series "Fix vaud18 power leakage of mt6359" from Shane Chien <shane.chien@mediatek.com>

"Shane.Chien" <shane.chien@mediatek.com>:

From: "Shane.Chien" <shane.chien@mediatek.com>

This series of patches is to fix vaud18 power leakage problem.
vaud18 will be enable only when mt6359 audio path is turned on.

Change since v2:
 - fix dt-binnding syntex error

Change since v1:
 - use dapm regulator supply widget for vaud18 control.
 - add vaud18 regulator property in mt6359 dt-binding.

Shane.Chien (2):
  ASoC: Fix vaud18 power leakage of mt6359
  dt-bindings: mediatek: mt6359: Add new property for mt6359

 .../devicetree/bindings/sound/mt6359.yaml          |    9 +++++++
 sound/soc/codecs/mt6359.c                          |   25 +-------------------
 sound/soc/codecs/mt6359.h                          |    8 -------
 3 files changed, 10 insertions(+), 32 deletions(-)

--
1.7.9.5
parents 068904bd 08651373
...@@ -17,6 +17,11 @@ description: | ...@@ -17,6 +17,11 @@ description: |
Must be a child node of PMIC wrapper. Must be a child node of PMIC wrapper.
properties: properties:
LDO_VAUD18-supply:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
Regulator of LDO VAUD18 at 1.8V.
mediatek,dmic-mode: mediatek,dmic-mode:
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
description: | description: |
...@@ -49,11 +54,15 @@ properties: ...@@ -49,11 +54,15 @@ properties:
description: | description: |
Specifies the type of mic type connected to adc2 Specifies the type of mic type connected to adc2
required:
- LDO_VAUD18-supply
additionalProperties: false additionalProperties: false
examples: examples:
- | - |
mt6359codec: mt6359codec { mt6359codec: mt6359codec {
LDO_VAUD18-supply = <&mt6359p_vaud18_reg>;
mediatek,dmic-mode = <0>; mediatek,dmic-mode = <0>;
mediatek,mic-type-0 = <2>; mediatek,mic-type-0 = <2>;
}; };
......
...@@ -1943,9 +1943,7 @@ static const struct snd_soc_dapm_widget mt6359_dapm_widgets[] = { ...@@ -1943,9 +1943,7 @@ static const struct snd_soc_dapm_widget mt6359_dapm_widgets[] = {
SND_SOC_DAPM_SUPPLY_S("CLK_BUF", SUPPLY_SEQ_CLK_BUF, SND_SOC_DAPM_SUPPLY_S("CLK_BUF", SUPPLY_SEQ_CLK_BUF,
MT6359_DCXO_CW12, MT6359_DCXO_CW12,
RG_XO_AUDIO_EN_M_SFT, 0, NULL, 0), RG_XO_AUDIO_EN_M_SFT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("LDO_VAUD18", SUPPLY_SEQ_LDO_VAUD18, SND_SOC_DAPM_REGULATOR_SUPPLY("LDO_VAUD18", 0, 0),
MT6359_LDO_VAUD18_CON0,
RG_LDO_VAUD18_EN_SFT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("AUDGLB", SUPPLY_SEQ_AUD_GLB, SND_SOC_DAPM_SUPPLY_S("AUDGLB", SUPPLY_SEQ_AUD_GLB,
MT6359_AUDDEC_ANA_CON13, MT6359_AUDDEC_ANA_CON13,
RG_AUDGLB_PWRDN_VA32_SFT, 1, NULL, 0), RG_AUDGLB_PWRDN_VA32_SFT, 1, NULL, 0),
...@@ -2807,20 +2805,6 @@ static int mt6359_platform_driver_probe(struct platform_device *pdev) ...@@ -2807,20 +2805,6 @@ static int mt6359_platform_driver_probe(struct platform_device *pdev)
dev_set_drvdata(&pdev->dev, priv); dev_set_drvdata(&pdev->dev, priv);
priv->dev = &pdev->dev; priv->dev = &pdev->dev;
priv->avdd_reg = devm_regulator_get(&pdev->dev, "vaud18");
if (IS_ERR(priv->avdd_reg)) {
dev_err(&pdev->dev, "%s(), have no vaud18 supply: %ld",
__func__, PTR_ERR(priv->avdd_reg));
return PTR_ERR(priv->avdd_reg);
}
ret = regulator_enable(priv->avdd_reg);
if (ret) {
dev_err(&pdev->dev, "%s(), failed to enable regulator!\n",
__func__);
return ret;
}
ret = mt6359_parse_dt(priv); ret = mt6359_parse_dt(priv);
if (ret) { if (ret) {
dev_warn(&pdev->dev, "%s() failed to parse dts\n", __func__); dev_warn(&pdev->dev, "%s() failed to parse dts\n", __func__);
...@@ -2841,13 +2825,6 @@ static int mt6359_platform_driver_remove(struct platform_device *pdev) ...@@ -2841,13 +2825,6 @@ static int mt6359_platform_driver_remove(struct platform_device *pdev)
dev_dbg(&pdev->dev, "%s(), dev name %s\n", dev_dbg(&pdev->dev, "%s(), dev name %s\n",
__func__, dev_name(&pdev->dev)); __func__, dev_name(&pdev->dev));
ret = regulator_disable(priv->avdd_reg);
if (ret) {
dev_err(&pdev->dev, "%s(), failed to disable regulator!\n",
__func__);
return ret;
}
return 0; return 0;
} }
......
...@@ -135,11 +135,6 @@ ...@@ -135,11 +135,6 @@
/* MT6359_DCXO_CW12 */ /* MT6359_DCXO_CW12 */
#define RG_XO_AUDIO_EN_M_SFT 13 #define RG_XO_AUDIO_EN_M_SFT 13
/* LDO_VAUD18_CON0 */
#define RG_LDO_VAUD18_EN_SFT 0
#define RG_LDO_VAUD18_EN_MASK 0x1
#define RG_LDO_VAUD18_EN_MASK_SFT (0x1 << 0)
/* AUD_TOP_CKPDN_CON0 */ /* AUD_TOP_CKPDN_CON0 */
#define RG_VOW13M_CK_PDN_SFT 13 #define RG_VOW13M_CK_PDN_SFT 13
#define RG_VOW13M_CK_PDN_MASK 0x1 #define RG_VOW13M_CK_PDN_MASK 0x1
...@@ -2132,7 +2127,6 @@ ...@@ -2132,7 +2127,6 @@
#define MT6359_DCXO_CW11 0x7a6 #define MT6359_DCXO_CW11 0x7a6
#define MT6359_DCXO_CW12 0x7a8 #define MT6359_DCXO_CW12 0x7a8
#define MT6359_LDO_VAUD18_CON0 0x1c98
#define MT6359_GPIO_MODE0 0xcc #define MT6359_GPIO_MODE0 0xcc
#define MT6359_GPIO_MODE0_SET 0xce #define MT6359_GPIO_MODE0_SET 0xce
...@@ -2469,7 +2463,6 @@ enum { ...@@ -2469,7 +2463,6 @@ enum {
enum { enum {
/* common */ /* common */
SUPPLY_SEQ_CLK_BUF, SUPPLY_SEQ_CLK_BUF,
SUPPLY_SEQ_LDO_VAUD18,
SUPPLY_SEQ_AUD_GLB, SUPPLY_SEQ_AUD_GLB,
SUPPLY_SEQ_HP_PULL_DOWN, SUPPLY_SEQ_HP_PULL_DOWN,
SUPPLY_SEQ_CLKSQ, SUPPLY_SEQ_CLKSQ,
...@@ -2629,7 +2622,6 @@ struct mt6359_priv { ...@@ -2629,7 +2622,6 @@ struct mt6359_priv {
int hp_gain_ctl; int hp_gain_ctl;
int hp_hifi_mode; int hp_hifi_mode;
int mtkaif_protocol; int mtkaif_protocol;
struct regulator *avdd_reg;
}; };
#define CODEC_MT6359_NAME "mtk-codec-mt6359" #define CODEC_MT6359_NAME "mtk-codec-mt6359"
......
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