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Commit 5375ef7d authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'qcom-arm64-for-4.16' of... 

Merge tag 'qcom-arm64-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt

Pull "Qualcomm ARM64 Updates for v4.16" from Andy Gross:

* Assorted cleanups for msm8916
* Fix IPC references for smsm

* tag 'qcom-arm64-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: qcom: msm8916-pins: keep cdc_dmic pins in suspend mode
  arm64: dts: qcom: msm8916-pins: move sdhc2 cd node with its siblings
  arm64: dts: qcom: msm8916: normalize I2C and SPI nodes
  arm64: dts: qcom: msm8916: drop unused board-specific nodes
  arm64: dts: qcom: msm8916-pins: remove assignments to bias-disable
  arm64: dts: qcom: pm8916: fix wcd_codec indentation
  arm64: dts: msm8916: Correct ipc references for smsm
  arm64: dts: msm8916: Add missing #phy-cells
parents 586b2a4b 342a2922
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Showing with 77 additions and 122 deletions
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
View file @ 5375ef7d
...@@ -278,7 +278,7 @@ pinmux { ...@@ -278,7 +278,7 @@ pinmux {
pinconf { pinconf {
pins = "gpio6", "gpio7"; pins = "gpio6", "gpio7";
drive-strength = <16>; drive-strength = <16>;
bias-disable = <0>; bias-disable;
}; };
}; };
...@@ -290,7 +290,7 @@ pinmux { ...@@ -290,7 +290,7 @@ pinmux {
pinconf { pinconf {
pins = "gpio6", "gpio7"; pins = "gpio6", "gpio7";
drive-strength = <2>; drive-strength = <2>;
bias-disable = <0>; bias-disable;
}; };
}; };
...@@ -302,7 +302,7 @@ pinmux { ...@@ -302,7 +302,7 @@ pinmux {
pinconf { pinconf {
pins = "gpio14", "gpio15"; pins = "gpio14", "gpio15";
drive-strength = <16>; drive-strength = <16>;
bias-disable = <0>; bias-disable;
}; };
}; };
...@@ -314,7 +314,7 @@ pinmux { ...@@ -314,7 +314,7 @@ pinmux {
pinconf { pinconf {
pins = "gpio14", "gpio15"; pins = "gpio14", "gpio15";
drive-strength = <2>; drive-strength = <2>;
bias-disable = <0>; bias-disable;
}; };
}; };
...@@ -326,7 +326,7 @@ pinmux { ...@@ -326,7 +326,7 @@ pinmux {
pinconf { pinconf {
pins = "gpio22", "gpio23"; pins = "gpio22", "gpio23";
drive-strength = <16>; drive-strength = <16>;
bias-disable = <0>; bias-disable;
}; };
}; };
...@@ -338,34 +338,9 @@ pinmux { ...@@ -338,34 +338,9 @@ pinmux {
pinconf { pinconf {
pins = "gpio22", "gpio23"; pins = "gpio22", "gpio23";
drive-strength = <2>; drive-strength = <2>;
bias-disable = <0>;
};
};
sdhc2_cd_pin {
sdc2_cd_on: cd_on {
pinmux {
function = "gpio";
pins = "gpio38";
};
pinconf {
pins = "gpio38";
drive-strength = <2>;
bias-pull-up;
};
};
sdc2_cd_off: cd_off {
pinmux {
function = "gpio";
pins = "gpio38";
};
pinconf {
pins = "gpio38";
drive-strength = <2>;
bias-disable; bias-disable;
}; };
}; };
};
pmx_sdc1_clk { pmx_sdc1_clk {
sdc1_clk_on: clk_on { sdc1_clk_on: clk_on {
...@@ -505,26 +480,25 @@ pinconf { ...@@ -505,26 +480,25 @@ pinconf {
}; };
}; };
ext-codec-lines { pmx_sdc2_cd_pin {
ext_codec_lines_act: lines_on { sdc2_cd_on: cd_on {
pinmux { pinmux {
function = "gpio"; function = "gpio";
pins = "gpio67"; pins = "gpio38";
}; };
pinconf { pinconf {
pins = "gpio67"; pins = "gpio38";
drive-strength = <8>; drive-strength = <2>;
bias-disable; bias-pull-up;
output-high;
}; };
}; };
ext_codec_lines_sus: lines_off { sdc2_cd_off: cd_off {
pinmux { pinmux {
function = "gpio"; function = "gpio";
pins = "gpio67"; pins = "gpio38";
}; };
pinconf { pinconf {
pins = "gpio67"; pins = "gpio38";
drive-strength = <2>; drive-strength = <2>;
bias-disable; bias-disable;
}; };
...@@ -687,34 +661,16 @@ pinconf { ...@@ -687,34 +661,16 @@ pinconf {
}; };
}; };
cdc_dmic_lines_sus: dmic_lines_off { cdc_dmic_lines_sus: dmic_lines_off {
pinconf { pinmux_dmic0_clk {
pins = "gpio0", "gpio1"; function = "dmic0_clk";
drive-strength = <2>; pins = "gpio0";
bias-disable;
};
};
};
cross-conn-det {
cross_conn_det_act: lines_on {
pinmux {
function = "gpio";
pins = "gpio120";
};
pinconf {
pins = "gpio120";
drive-strength = <8>;
output-low;
bias-pull-down;
};
}; };
cross_conn_det_sus: lines_off { pinmux_dmic0_data {
pinmux { function = "dmic0_data";
function = "gpio"; pins = "gpio1";
pins = "gpio120";
}; };
pinconf { pinconf {
pins = "gpio120"; pins = "gpio0", "gpio1";
drive-strength = <2>; drive-strength = <2>;
bias-disable; bias-disable;
}; };
......
arch/arm64/boot/dts/qcom/msm8916.dtsi
View file @ 5375ef7d
...@@ -355,7 +355,7 @@ blsp_dma: dma@7884000 { ...@@ -355,7 +355,7 @@ blsp_dma: dma@7884000 {
blsp_spi1: spi@78b5000 { blsp_spi1: spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1"; compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b5000 0x600>; reg = <0x078b5000 0x500>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>; <&gcc GCC_BLSP1_AHB_CLK>;
...@@ -372,7 +372,7 @@ blsp_spi1: spi@78b5000 { ...@@ -372,7 +372,7 @@ blsp_spi1: spi@78b5000 {
blsp_spi2: spi@78b6000 { blsp_spi2: spi@78b6000 {
compatible = "qcom,spi-qup-v2.2.1"; compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b6000 0x600>; reg = <0x078b6000 0x500>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>; <&gcc GCC_BLSP1_AHB_CLK>;
...@@ -389,7 +389,7 @@ blsp_spi2: spi@78b6000 { ...@@ -389,7 +389,7 @@ blsp_spi2: spi@78b6000 {
blsp_spi3: spi@78b7000 { blsp_spi3: spi@78b7000 {
compatible = "qcom,spi-qup-v2.2.1"; compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b7000 0x600>; reg = <0x078b7000 0x500>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>, clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>; <&gcc GCC_BLSP1_AHB_CLK>;
...@@ -406,7 +406,7 @@ blsp_spi3: spi@78b7000 { ...@@ -406,7 +406,7 @@ blsp_spi3: spi@78b7000 {
blsp_spi4: spi@78b8000 { blsp_spi4: spi@78b8000 {
compatible = "qcom,spi-qup-v2.2.1"; compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b8000 0x600>; reg = <0x078b8000 0x500>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>, clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>; <&gcc GCC_BLSP1_AHB_CLK>;
...@@ -423,7 +423,7 @@ blsp_spi4: spi@78b8000 { ...@@ -423,7 +423,7 @@ blsp_spi4: spi@78b8000 {
blsp_spi5: spi@78b9000 { blsp_spi5: spi@78b9000 {
compatible = "qcom,spi-qup-v2.2.1"; compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b9000 0x600>; reg = <0x078b9000 0x500>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>, clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>; <&gcc GCC_BLSP1_AHB_CLK>;
...@@ -440,7 +440,7 @@ blsp_spi5: spi@78b9000 { ...@@ -440,7 +440,7 @@ blsp_spi5: spi@78b9000 {
blsp_spi6: spi@78ba000 { blsp_spi6: spi@78ba000 {
compatible = "qcom,spi-qup-v2.2.1"; compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078ba000 0x600>; reg = <0x078ba000 0x500>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>, clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>; <&gcc GCC_BLSP1_AHB_CLK>;
...@@ -457,7 +457,7 @@ blsp_spi6: spi@78ba000 { ...@@ -457,7 +457,7 @@ blsp_spi6: spi@78ba000 {
blsp_i2c2: i2c@78b6000 { blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1"; compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b6000 0x1000>; reg = <0x078b6000 0x500>;
interrupts = <GIC_SPI 96 0>; interrupts = <GIC_SPI 96 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>, clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
...@@ -472,7 +472,7 @@ blsp_i2c2: i2c@78b6000 { ...@@ -472,7 +472,7 @@ blsp_i2c2: i2c@78b6000 {
blsp_i2c4: i2c@78b8000 { blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1"; compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b8000 0x1000>; reg = <0x078b8000 0x500>;
interrupts = <GIC_SPI 98 0>; interrupts = <GIC_SPI 98 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>, clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>; <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
...@@ -487,7 +487,7 @@ blsp_i2c4: i2c@78b8000 { ...@@ -487,7 +487,7 @@ blsp_i2c4: i2c@78b8000 {
blsp_i2c6: i2c@78ba000 { blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1"; compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78ba000 0x1000>; reg = <0x078ba000 0x500>;
interrupts = <GIC_SPI 100 0>; interrupts = <GIC_SPI 100 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>, clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
...@@ -906,6 +906,7 @@ dsi_phy0: dsi-phy@1a98300 { ...@@ -906,6 +906,7 @@ dsi_phy0: dsi-phy@1a98300 {
"dsi_phy_regulator"; "dsi_phy_regulator";
#clock-cells = <1>; #clock-cells = <1>;
#phy-cells = <0>;
clocks = <&gcc GCC_MDSS_AHB_CLK>; clocks = <&gcc GCC_MDSS_AHB_CLK>;
clock-names = "iface_clk"; clock-names = "iface_clk";
...@@ -1435,8 +1436,8 @@ smsm { ...@@ -1435,8 +1436,8 @@ smsm {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
qcom,ipc-1 = <&apcs 0 13>; qcom,ipc-1 = <&apcs 8 13>;
qcom,ipc-6 = <&apcs 0 19>; qcom,ipc-3 = <&apcs 8 19>;
apps_smsm: apps@0 { apps_smsm: apps@0 {
reg = <0>; reg = <0>;
......
arch/arm64/boot/dts/qcom/pm8916.dtsi
View file @ 5375ef7d
...@@ -136,8 +136,6 @@ wcd_codec: codec@f000 { ...@@ -136,8 +136,6 @@ wcd_codec: codec@f000 {
vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>; vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
vdd-micbias-supply = <&pm8916_l13>; vdd-micbias-supply = <&pm8916_l13>;
#sound-dai-cells = <1>; #sound-dai-cells = <1>;
}; };
}; };
}; };
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