Commit 5a9b255f authored by Animesh Manna's avatar Animesh Manna

drm/i915/alpm: Enable lobf from source in ALPM_CTL

Set the Link Off Between Frames Enable bit in ALPM_CTL register.

Note: Lobf need to be enabled adaptive sync fixed refresh mode
where vmin = vmax = flipline, which will arise after cmmr feature
enablement. Will add enabling sequence in a separate patch.

v1: Initial version.
v2: Condition check modified in alpm_configure(). [Jouni]
Reviewed-by: default avatarJouni Högander <jouni.hogander@intel.com>
Signed-off-by: default avatarAnimesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529200742.1694401-6-animesh.manna@intel.com
parent 15438b32
...@@ -304,10 +304,11 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, ...@@ -304,10 +304,11 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
(first_sdp_position + waketime_in_lines); (first_sdp_position + waketime_in_lines);
} }
static void lnl_alpm_configure(struct intel_dp *intel_dp) static void lnl_alpm_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{ {
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
enum transcoder cpu_transcoder = intel_dp->psr.transcoder; enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
u32 alpm_ctl; u32 alpm_ctl;
if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.sel_update_enabled && if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.sel_update_enabled &&
...@@ -318,7 +319,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp) ...@@ -318,7 +319,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
* Panel Replay on eDP is always using ALPM aux less. I.e. no need to * Panel Replay on eDP is always using ALPM aux less. I.e. no need to
* check panel support at this point. * check panel support at this point.
*/ */
if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) { if ((intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) ||
(crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp))) {
alpm_ctl = ALPM_CTL_ALPM_ENABLE | alpm_ctl = ALPM_CTL_ALPM_ENABLE |
ALPM_CTL_ALPM_AUX_LESS_ENABLE | ALPM_CTL_ALPM_AUX_LESS_ENABLE |
ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS; ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
...@@ -345,12 +347,16 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp) ...@@ -345,12 +347,16 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp->alpm_parameters.fast_wake_lines); ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp->alpm_parameters.fast_wake_lines);
} }
if (crtc_state->has_lobf)
alpm_ctl |= ALPM_CTL_LOBF_ENABLE;
alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines); alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines);
intel_de_write(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder), alpm_ctl); intel_de_write(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder), alpm_ctl);
} }
void intel_alpm_configure(struct intel_dp *intel_dp) void intel_alpm_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{ {
lnl_alpm_configure(intel_dp); lnl_alpm_configure(intel_dp, crtc_state);
} }
...@@ -18,6 +18,6 @@ bool intel_alpm_compute_params(struct intel_dp *intel_dp, ...@@ -18,6 +18,6 @@ bool intel_alpm_compute_params(struct intel_dp *intel_dp,
void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state, struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state); struct drm_connector_state *conn_state);
void intel_alpm_configure(struct intel_dp *intel_dp); void intel_alpm_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
#endif #endif
...@@ -1685,7 +1685,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, ...@@ -1685,7 +1685,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
IGNORE_PSR2_HW_TRACKING : 0); IGNORE_PSR2_HW_TRACKING : 0);
if (intel_dp_is_edp(intel_dp)) if (intel_dp_is_edp(intel_dp))
intel_alpm_configure(intel_dp); intel_alpm_configure(intel_dp, crtc_state);
/* /*
* Wa_16013835468 * Wa_16013835468
......
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