Commit 5cd54ab8 authored by Le Ma's avatar Le Ma Committed by Alex Deucher

drm/amdgpu: correct Arcturus SDMA address space base index

Signed-off-by: default avatarLe Ma <le.ma@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3d81f67a
...@@ -211,17 +211,17 @@ static u32 sdma_v4_0_get_reg_offset(struct amdgpu_device *adev, ...@@ -211,17 +211,17 @@ static u32 sdma_v4_0_get_reg_offset(struct amdgpu_device *adev,
case 1: case 1:
return (adev->reg_offset[SDMA1_HWIP][0][0] + offset); return (adev->reg_offset[SDMA1_HWIP][0][0] + offset);
case 2: case 2:
return (adev->reg_offset[SDMA2_HWIP][0][0] + offset); return (adev->reg_offset[SDMA2_HWIP][0][1] + offset);
case 3: case 3:
return (adev->reg_offset[SDMA3_HWIP][0][0] + offset); return (adev->reg_offset[SDMA3_HWIP][0][1] + offset);
case 4: case 4:
return (adev->reg_offset[SDMA4_HWIP][0][0] + offset); return (adev->reg_offset[SDMA4_HWIP][0][1] + offset);
case 5: case 5:
return (adev->reg_offset[SDMA5_HWIP][0][0] + offset); return (adev->reg_offset[SDMA5_HWIP][0][1] + offset);
case 6: case 6:
return (adev->reg_offset[SDMA6_HWIP][0][0] + offset); return (adev->reg_offset[SDMA6_HWIP][0][1] + offset);
case 7: case 7:
return (adev->reg_offset[SDMA7_HWIP][0][0] + offset); return (adev->reg_offset[SDMA7_HWIP][0][1] + offset);
default: default:
break; break;
} }
......
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