drm/i915: Introduce SAGV transtion watermark

Seems to me that if we calculate WM0 using the bumped up SAGV latency
we need to calculate the transition watermark accordingly. Track it
alongside the other watermarks.

Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210226153204.1270-6-ville.syrjala@linux.intel.comReviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

drivers/gpu/drm/i915/display/intel_display.c

@@ -9472,7 +9472,9 @@ static void verify_wm_state(struct intel_crtc *crtc,
 		}
 
 		if (!skl_wm_level_equals(&hw_plane_wm->trans_wm,
-					 &sw_plane_wm->trans_wm)) {
+					 &sw_plane_wm->trans_wm) &&
+		    !skl_wm_level_equals(&hw_plane_wm->trans_wm,
+					 &sw_plane_wm->sagv.trans_wm)) {
 			drm_err(&dev_priv->drm,
 				"mismatch in trans WM pipe %c cursor (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
 				pipe_name(pipe),

drivers/gpu/drm/i915/display/intel_display_types.h

@@ -734,6 +734,7 @@ struct skl_plane_wm {
 	struct skl_wm_level trans_wm;
 	struct {
 		struct skl_wm_level wm0;
+		struct skl_wm_level trans_wm;
 	} sagv;
 	bool is_planar;
 };