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Commit 63365013 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull arm-soc bug fixes from Olof Johansson:
 "A couple of samsung clock locking fixes, at91 device tree gpio
  configuration fix and a couple more for shmobile and i.MX.

  All small targeted fixes."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM i.MX25: Make timer irq work again
  ARM: imx: armadillo5x0: Fix illegal register access
  ARM: shmobile: kzm9g: bugfix: correct mmcif interrupt settings
  ARM: SAMSUNG: Use spin_lock_{irqsave,irqrestore} in clk_set_rate
  ARM: at91: fix missing #interrupt-cells on gpio-controller
  ARM: SAMSUNG: use spin_lock_irqsave() in clk_set_parent
parents 267b50fe 23f3f061
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Showing with 33 additions and 8 deletions
arch/arm/boot/dts/at91sam9260.dtsi
View file @ 63365013
...@@ -104,6 +104,7 @@ pioA: gpio@fffff400 { ...@@ -104,6 +104,7 @@ pioA: gpio@fffff400 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioB: gpio@fffff600 { pioB: gpio@fffff600 {
...@@ -113,6 +114,7 @@ pioB: gpio@fffff600 { ...@@ -113,6 +114,7 @@ pioB: gpio@fffff600 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioC: gpio@fffff800 { pioC: gpio@fffff800 {
...@@ -122,6 +124,7 @@ pioC: gpio@fffff800 { ...@@ -122,6 +124,7 @@ pioC: gpio@fffff800 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
......
arch/arm/boot/dts/at91sam9263.dtsi
View file @ 63365013
...@@ -95,6 +95,7 @@ pioA: gpio@fffff200 { ...@@ -95,6 +95,7 @@ pioA: gpio@fffff200 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioB: gpio@fffff400 { pioB: gpio@fffff400 {
...@@ -104,6 +105,7 @@ pioB: gpio@fffff400 { ...@@ -104,6 +105,7 @@ pioB: gpio@fffff400 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioC: gpio@fffff600 { pioC: gpio@fffff600 {
...@@ -113,6 +115,7 @@ pioC: gpio@fffff600 { ...@@ -113,6 +115,7 @@ pioC: gpio@fffff600 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioD: gpio@fffff800 { pioD: gpio@fffff800 {
...@@ -122,6 +125,7 @@ pioD: gpio@fffff800 { ...@@ -122,6 +125,7 @@ pioD: gpio@fffff800 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioE: gpio@fffffa00 { pioE: gpio@fffffa00 {
...@@ -131,6 +135,7 @@ pioE: gpio@fffffa00 { ...@@ -131,6 +135,7 @@ pioE: gpio@fffffa00 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
dbgu: serial@ffffee00 { dbgu: serial@ffffee00 {
......
arch/arm/boot/dts/at91sam9g45.dtsi
View file @ 63365013
...@@ -113,6 +113,7 @@ pioA: gpio@fffff200 { ...@@ -113,6 +113,7 @@ pioA: gpio@fffff200 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioB: gpio@fffff400 { pioB: gpio@fffff400 {
...@@ -122,6 +123,7 @@ pioB: gpio@fffff400 { ...@@ -122,6 +123,7 @@ pioB: gpio@fffff400 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioC: gpio@fffff600 { pioC: gpio@fffff600 {
...@@ -131,6 +133,7 @@ pioC: gpio@fffff600 { ...@@ -131,6 +133,7 @@ pioC: gpio@fffff600 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioD: gpio@fffff800 { pioD: gpio@fffff800 {
...@@ -140,6 +143,7 @@ pioD: gpio@fffff800 { ...@@ -140,6 +143,7 @@ pioD: gpio@fffff800 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioE: gpio@fffffa00 { pioE: gpio@fffffa00 {
...@@ -149,6 +153,7 @@ pioE: gpio@fffffa00 { ...@@ -149,6 +153,7 @@ pioE: gpio@fffffa00 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
dbgu: serial@ffffee00 { dbgu: serial@ffffee00 {
......
arch/arm/boot/dts/at91sam9n12.dtsi
View file @ 63365013
...@@ -107,6 +107,7 @@ pioA: gpio@fffff400 { ...@@ -107,6 +107,7 @@ pioA: gpio@fffff400 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioB: gpio@fffff600 { pioB: gpio@fffff600 {
...@@ -116,6 +117,7 @@ pioB: gpio@fffff600 { ...@@ -116,6 +117,7 @@ pioB: gpio@fffff600 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioC: gpio@fffff800 { pioC: gpio@fffff800 {
...@@ -125,6 +127,7 @@ pioC: gpio@fffff800 { ...@@ -125,6 +127,7 @@ pioC: gpio@fffff800 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioD: gpio@fffffa00 { pioD: gpio@fffffa00 {
...@@ -134,6 +137,7 @@ pioD: gpio@fffffa00 { ...@@ -134,6 +137,7 @@ pioD: gpio@fffffa00 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
......
arch/arm/boot/dts/at91sam9x5.dtsi
View file @ 63365013
...@@ -115,6 +115,7 @@ pioA: gpio@fffff400 { ...@@ -115,6 +115,7 @@ pioA: gpio@fffff400 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioB: gpio@fffff600 { pioB: gpio@fffff600 {
...@@ -124,6 +125,7 @@ pioB: gpio@fffff600 { ...@@ -124,6 +125,7 @@ pioB: gpio@fffff600 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioC: gpio@fffff800 { pioC: gpio@fffff800 {
...@@ -133,6 +135,7 @@ pioC: gpio@fffff800 { ...@@ -133,6 +135,7 @@ pioC: gpio@fffff800 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
pioD: gpio@fffffa00 { pioD: gpio@fffffa00 {
...@@ -142,6 +145,7 @@ pioD: gpio@fffffa00 { ...@@ -142,6 +145,7 @@ pioD: gpio@fffffa00 {
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
......
arch/arm/mach-imx/clk-imx25.c
View file @ 63365013
...@@ -241,6 +241,6 @@ int __init mx25_clocks_init(void) ...@@ -241,6 +241,6 @@ int __init mx25_clocks_init(void)
clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
clk_register_clkdev(clk[iim_ipg], "iim", NULL); clk_register_clkdev(clk[iim_ipg], "iim", NULL);
mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
return 0; return 0;
} }
arch/arm/mach-imx/mach-armadillo5x0.c
View file @ 63365013
...@@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void) ...@@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void)
imx31_add_mxc_nand(&armadillo5x0_nand_board_info); imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
/* set NAND page size to 2k if not configured via boot mode pins */ /* set NAND page size to 2k if not configured via boot mode pins */
__raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); __raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) |
(1 << 30), mx3_ccm_base + MXC_CCM_RCSR);
/* RTC */ /* RTC */
/* Get RTC IRQ and register the chip */ /* Get RTC IRQ and register the chip */
......
arch/arm/mach-shmobile/board-kzm9g.c
View file @ 63365013
...@@ -346,11 +346,11 @@ static struct resource sh_mmcif_resources[] = { ...@@ -346,11 +346,11 @@ static struct resource sh_mmcif_resources[] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = gic_spi(141), .start = gic_spi(140),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
[2] = { [2] = {
.start = gic_spi(140), .start = gic_spi(141),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
......
arch/arm/plat-mxc/include/mach/mx25.h
View file @ 63365013
...@@ -98,6 +98,7 @@ ...@@ -98,6 +98,7 @@
#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45) #define MX25_INT_UART1 (NR_IRQS_LEGACY + 45)
#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51) #define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51)
#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52) #define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52)
#define MX25_INT_GPT1 (NR_IRQS_LEGACY + 54)
#define MX25_INT_FEC (NR_IRQS_LEGACY + 57) #define MX25_INT_FEC (NR_IRQS_LEGACY + 57)
#define MX25_DMA_REQ_SSI2_RX1 22 #define MX25_DMA_REQ_SSI2_RX1 22
......
arch/arm/plat-samsung/clock.c
View file @ 63365013
...@@ -144,6 +144,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate) ...@@ -144,6 +144,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
int clk_set_rate(struct clk *clk, unsigned long rate) int clk_set_rate(struct clk *clk, unsigned long rate)
{ {
unsigned long flags;
int ret; int ret;
if (IS_ERR(clk)) if (IS_ERR(clk))
...@@ -159,9 +160,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate) ...@@ -159,9 +160,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
if (clk->ops == NULL || clk->ops->set_rate == NULL) if (clk->ops == NULL || clk->ops->set_rate == NULL)
return -EINVAL; return -EINVAL;
spin_lock(&clocks_lock); spin_lock_irqsave(&clocks_lock, flags);
ret = (clk->ops->set_rate)(clk, rate); ret = (clk->ops->set_rate)(clk, rate);
spin_unlock(&clocks_lock); spin_unlock_irqrestore(&clocks_lock, flags);
return ret; return ret;
} }
...@@ -173,17 +174,18 @@ struct clk *clk_get_parent(struct clk *clk) ...@@ -173,17 +174,18 @@ struct clk *clk_get_parent(struct clk *clk)
int clk_set_parent(struct clk *clk, struct clk *parent) int clk_set_parent(struct clk *clk, struct clk *parent)
{ {
unsigned long flags;
int ret = 0; int ret = 0;
if (IS_ERR(clk)) if (IS_ERR(clk))
return -EINVAL; return -EINVAL;
spin_lock(&clocks_lock); spin_lock_irqsave(&clocks_lock, flags);
if (clk->ops && clk->ops->set_parent) if (clk->ops && clk->ops->set_parent)
ret = (clk->ops->set_parent)(clk, parent); ret = (clk->ops->set_parent)(clk, parent);
spin_unlock(&clocks_lock); spin_unlock_irqrestore(&clocks_lock, flags);
return ret; return ret;
} }
......
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