drm/tegra: dsi: Prepare for generic PM domain support

The DSI driver for Tegra requires the SOR power partition to be enabled.
Now that Tegra supports the generic PM domain framework we manage the
SOR power partition via this framework. However, the sequence for
gating/ungating the SOR power partition requires that the DSI reset is
asserted/de-asserted at the time the SOR power partition is
gated/ungated, respectively. Now that the reset control core assumes
that resets are exclusive, the Tegra generic PM domain code and the DSI
driver cannot request the same reset unless we mark the reset as shared.
Sharing resets will not work in this case because we cannot guarantee
that the reset will be asserted/de-asserted at the appropriate time.
Therefore, given that the Tegra generic PM domain code will handle the
resets, do not request the reset in the DSI driver if the DSI device has
a PM domain associated.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

drivers/gpu/drm/tegra/dsi.c

@@ -1489,9 +1489,11 @@ static int tegra_dsi_probe(struct platform_device *pdev)
 	dsi->format = MIPI_DSI_FMT_RGB888;
 	dsi->lanes = 4;
 
+	if (!pdev->dev.pm_domain) {
 		dsi->rst = devm_reset_control_get(&pdev->dev, "dsi");
 		if (IS_ERR(dsi->rst))
 			return PTR_ERR(dsi->rst);
+	}
 
 	dsi->clk = devm_clk_get(&pdev->dev, NULL);
 	if (IS_ERR(dsi->clk)) {
@@ -1592,11 +1594,13 @@ static int tegra_dsi_suspend(struct device *dev)
 	struct tegra_dsi *dsi = dev_get_drvdata(dev);
 	int err;
 
+	if (dsi->rst) {
 		err = reset_control_assert(dsi->rst);
 		if (err < 0) {
 			dev_err(dev, "failed to assert reset: %d\n", err);
 			return err;
 		}
+	}
 
 	usleep_range(1000, 2000);
 
@@ -1633,11 +1637,13 @@ static int tegra_dsi_resume(struct device *dev)
 
 	usleep_range(1000, 2000);
 
+	if (dsi->rst) {
 		err = reset_control_deassert(dsi->rst);
 		if (err < 0) {
 			dev_err(dev, "cannot assert reset: %d\n", err);
 			goto disable_clk_lp;
 		}
+	}
 
 	return 0;