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Commit 67833805 authored by Michael Walle's avatar Michael Walle Committed by Shawn Guo
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arm64: dts: ls1028a: move PHY nodes to MDIO controller 

Move the PHY nodes from the network controller to the dedicated MDIO
controller. According to Vladimir Oltean direct MDIO access via the PF,
that is when the PHY is put under the "mdio" subnode, is defeatured and
in fact the latest reference manual isn't mentioning it anymore.
Suggested-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Reviewed-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 70293bea
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Showing with 67 additions and 90 deletions
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts
View file @ 67833805
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
* None of the four SerDes lanes are used by the module, instead they are * None of the four SerDes lanes are used by the module, instead they are
* all led out to the carrier for customer use. * all led out to the carrier for customer use.
* *
* Copyright (C) 2020 Michael Walle <michael@walle.cc> * Copyright (C) 2021 Michael Walle <michael@walle.cc>
* *
*/ */
...@@ -21,43 +21,39 @@ / { ...@@ -21,43 +21,39 @@ / {
compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a"; compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";
}; };
&enetc_mdio_pf3 {
/* Delete unused phy node */
/delete-node/ ethernet-phy@5;
phy0: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
qca,keep-pll-enabled;
vddio-supply = <&vddio>;
vddio: vddio-regulator {
regulator-name = "VDDIO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddh: vddh-regulator {
regulator-name = "VDDH";
};
};
};
&enetc_port0 { &enetc_port0 {
status = "disabled"; status = "disabled";
/* /* Delete the phy-handle to the old phy0 label */
* Delete both the phy-handle to the old phy0 label as well as
* the mdio node with the old phy node with the old phy0 label.
*/
/delete-property/ phy-handle; /delete-property/ phy-handle;
/delete-node/ mdio;
}; };
&enetc_port1 { &enetc_port1 {
phy-handle = <&phy0>; phy-handle = <&phy0>;
phy-connection-type = "rgmii-id"; phy-connection-type = "rgmii-id";
status = "okay"; status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
qca,keep-pll-enabled;
vddio-supply = <&vddio>;
vddio: vddio-regulator {
regulator-name = "VDDIO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddh: vddh-regulator {
regulator-name = "VDDH";
};
};
};
}; };
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dts
View file @ 67833805
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* This is for the network variant 2 which has two ethernet ports. These * This is for the network variant 2 which has two ethernet ports. These
* ports are connected to the internal switch. * ports are connected to the internal switch.
* *
* Copyright (C) 2020 Michael Walle <michael@walle.cc> * Copyright (C) 2021 Michael Walle <michael@walle.cc>
* *
*/ */
...@@ -18,12 +18,6 @@ / { ...@@ -18,12 +18,6 @@ / {
}; };
&enetc_mdio_pf3 { &enetc_mdio_pf3 {
phy0: ethernet-phy@5 {
reg = <0x5>;
eee-broken-1000t;
eee-broken-100tx;
};
phy1: ethernet-phy@4 { phy1: ethernet-phy@4 {
reg = <0x4>; reg = <0x4>;
eee-broken-1000t; eee-broken-1000t;
...@@ -34,14 +28,11 @@ phy1: ethernet-phy@4 { ...@@ -34,14 +28,11 @@ phy1: ethernet-phy@4 {
&enetc_port0 { &enetc_port0 {
status = "disabled"; status = "disabled";
/* /*
* In the base device tree the PHY was registered in the mdio * In the base device tree the PHY at address 5 was assigned for
* subnode as it is PHY for this port. On this module this PHY * this port. On this module this PHY is connected to a switch
* is connected to a switch port instead and registered above. * port instead. Therefore, delete the phy-handle property here.
* Therefore, delete the mdio subnode as well as the phy-handle
* property here.
*/ */
/delete-property/ phy-handle; /delete-property/ phy-handle;
/delete-node/ mdio;
}; };
&enetc_port2 { &enetc_port2 {
......
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts
View file @ 67833805
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* This is for the network variant 4 which has two ethernet ports. It * This is for the network variant 4 which has two ethernet ports. It
* extends the base and provides one more port connected via RGMII. * extends the base and provides one more port connected via RGMII.
* *
* Copyright (C) 2019 Michael Walle <michael@walle.cc> * Copyright (C) 2021 Michael Walle <michael@walle.cc>
* *
*/ */
...@@ -18,33 +18,30 @@ / { ...@@ -18,33 +18,30 @@ / {
compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a"; compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";
}; };
&enetc_port1 { &enetc_mdio_pf3 {
phy-handle = <&phy1>; phy1: ethernet-phy@4 {
phy-connection-type = "rgmii-id"; reg = <0x4>;
status = "okay"; eee-broken-1000t;
eee-broken-100tx;
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
qca,keep-pll-enabled;
vddio-supply = <&vddio>;
mdio { vddio: vddio-regulator {
#address-cells = <1>; regulator-name = "VDDIO";
#size-cells = <0>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
phy1: ethernet-phy@4 { };
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
qca,keep-pll-enabled;
vddio-supply = <&vddio>;
vddio: vddio-regulator {
regulator-name = "VDDIO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddh: vddh-regulator { vddh: vddh-regulator {
regulator-name = "VDDH"; regulator-name = "VDDH";
};
}; };
}; };
}; };
&enetc_port1 {
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
View file @ 67833805
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
/* /*
* Device Tree file for the Kontron SMARC-sAL28 board. * Device Tree file for the Kontron SMARC-sAL28 board.
* *
* Copyright (C) 2019 Michael Walle <michael@walle.cc> * Copyright (C) 2021 Michael Walle <michael@walle.cc>
* *
*/ */
...@@ -80,22 +80,19 @@ &duart1 { ...@@ -80,22 +80,19 @@ &duart1 {
status = "okay"; status = "okay";
}; };
&enetc_mdio_pf3 {
phy0: ethernet-phy@5 {
reg = <0x5>;
eee-broken-1000t;
eee-broken-100tx;
};
};
&enetc_port0 { &enetc_port0 {
phy-handle = <&phy0>; phy-handle = <&phy0>;
phy-connection-type = "sgmii"; phy-connection-type = "sgmii";
managed = "in-band-status"; managed = "in-band-status";
status = "okay"; status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@5 {
reg = <0x5>;
eee-broken-1000t;
eee-broken-100tx;
};
};
}; };
&esdhc { &esdhc {
......
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
View file @ 67833805
...@@ -197,6 +197,10 @@ &duart1 { ...@@ -197,6 +197,10 @@ &duart1 {
}; };
&enetc_mdio_pf3 { &enetc_mdio_pf3 {
sgmii_phy0: ethernet-phy@2 {
reg = <0x2>;
};
/* VSC8514 QSGMII quad PHY */ /* VSC8514 QSGMII quad PHY */
qsgmii_phy0: ethernet-phy@10 { qsgmii_phy0: ethernet-phy@10 {
reg = <0x10>; reg = <0x10>;
...@@ -220,14 +224,6 @@ &enetc_port0 { ...@@ -220,14 +224,6 @@ &enetc_port0 {
phy-connection-type = "sgmii"; phy-connection-type = "sgmii";
managed = "in-band-status"; managed = "in-band-status";
status = "okay"; status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
sgmii_phy0: ethernet-phy@2 {
reg = <0x2>;
};
};
}; };
&enetc_port2 { &enetc_port2 {
......
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