Commit 67841769 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski

clk: samsung: exynos5410: do not define number of clocks in bindings

Number of clocks supported by Linux drivers might vary - sometimes we
add new clocks, not exposed previously.  Therefore these numbers of
clocks should not be in the bindings, as that prevents changing them.

Define number of clocks per each clock controller inside the driver
directly.
Reviewed-by: default avatarAlim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20230808082738.122804-6-krzysztof.kozlowski@linaro.orgSigned-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 727d0f06
...@@ -56,6 +56,9 @@ ...@@ -56,6 +56,9 @@
#define SRC_KFC 0x28200 #define SRC_KFC 0x28200
#define DIV_KFC0 0x28500 #define DIV_KFC0 0x28500
/* NOTE: Must be equal to the last clock ID increased by one */
#define CLKS_NR 512
/* list of PLLs */ /* list of PLLs */
enum exynos5410_plls { enum exynos5410_plls {
apll, cpll, epll, mpll, apll, cpll, epll, mpll,
...@@ -260,7 +263,7 @@ static const struct samsung_cmu_info cmu __initconst = { ...@@ -260,7 +263,7 @@ static const struct samsung_cmu_info cmu __initconst = {
.nr_div_clks = ARRAY_SIZE(exynos5410_div_clks), .nr_div_clks = ARRAY_SIZE(exynos5410_div_clks),
.gate_clks = exynos5410_gate_clks, .gate_clks = exynos5410_gate_clks,
.nr_gate_clks = ARRAY_SIZE(exynos5410_gate_clks), .nr_gate_clks = ARRAY_SIZE(exynos5410_gate_clks),
.nr_clk_ids = CLK_NR_CLKS, .nr_clk_ids = CLKS_NR,
}; };
/* register exynos5410 clocks */ /* register exynos5410 clocks */
......
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