Commit 69adb983 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge branch 'ux500/timers' into next/timer

* ux500/timers:
  ARM: plat-nomadik: modernize MTU timer
  ARM: plat-nomadik: handle clocking properly
  ARM: plat-nomadik: get rid of global mtu base pointer
parents b01543df 0ee411ae
...@@ -27,11 +27,11 @@ ...@@ -27,11 +27,11 @@
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/irq.h> #include <asm/mach/irq.h>
#include <asm/mach/flash.h> #include <asm/mach/flash.h>
#include <asm/mach/time.h>
#include <plat/gpio-nomadik.h> #include <plat/gpio-nomadik.h>
#include <plat/mtu.h> #include <plat/mtu.h>
#include <mach/setup.h>
#include <mach/nand.h> #include <mach/nand.h>
#include <mach/fsmc.h> #include <mach/fsmc.h>
...@@ -255,10 +255,7 @@ static void __init nomadik_timer_init(void) ...@@ -255,10 +255,7 @@ static void __init nomadik_timer_init(void)
src_cr |= SRC_CR_INIT_VAL; src_cr |= SRC_CR_INIT_VAL;
writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); writel(src_cr, io_p2v(NOMADIK_SRC_BASE));
/* Save global pointer to mtu, used by platform timer code */ nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE));
mtu_base = io_p2v(NOMADIK_MTU0_BASE);
nmdk_timer_init();
} }
static struct sys_timer nomadik_timer = { static struct sys_timer nomadik_timer = {
......
/*
* These symbols are needed for board-specific files to call their
* own cpu-specific files
*/
#ifndef __ASM_ARCH_SETUP_H
#define __ASM_ARCH_SETUP_H
#include <asm/mach/time.h>
#include <linux/init.h>
#ifdef CONFIG_NOMADIK_8815
extern void nmdk_timer_init(void);
#endif /* NOMADIK_8815 */
#endif /* __ASM_ARCH_SETUP_H */
...@@ -27,9 +27,6 @@ extern void __init u5500_sdi_init(void); ...@@ -27,9 +27,6 @@ extern void __init u5500_sdi_init(void);
extern void __init db5500_dma_init(void); extern void __init db5500_dma_init(void);
/* We re-use nomadik_timer for this platform */
extern void nmdk_timer_init(void);
struct amba_device; struct amba_device;
extern void __init amba_add_devices(struct amba_device *devs[], int num); extern void __init amba_add_devices(struct amba_device *devs[], int num);
......
...@@ -17,19 +17,20 @@ ...@@ -17,19 +17,20 @@
static void __init ux500_timer_init(void) static void __init ux500_timer_init(void)
{ {
void __iomem *mtu_timer_base;
void __iomem *prcmu_timer_base; void __iomem *prcmu_timer_base;
if (cpu_is_u5500()) { if (cpu_is_u5500()) {
#ifdef CONFIG_LOCAL_TIMERS #ifdef CONFIG_LOCAL_TIMERS
twd_base = __io_address(U5500_TWD_BASE); twd_base = __io_address(U5500_TWD_BASE);
#endif #endif
mtu_base = __io_address(U5500_MTU0_BASE); mtu_timer_base = __io_address(U5500_MTU0_BASE);
prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE); prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE);
} else if (cpu_is_u8500()) { } else if (cpu_is_u8500()) {
#ifdef CONFIG_LOCAL_TIMERS #ifdef CONFIG_LOCAL_TIMERS
twd_base = __io_address(U8500_TWD_BASE); twd_base = __io_address(U8500_TWD_BASE);
#endif #endif
mtu_base = __io_address(U8500_MTU0_BASE); mtu_timer_base = __io_address(U8500_MTU0_BASE);
prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE); prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
} else { } else {
ux500_unknown_soc(); ux500_unknown_soc();
...@@ -52,7 +53,7 @@ static void __init ux500_timer_init(void) ...@@ -52,7 +53,7 @@ static void __init ux500_timer_init(void)
* *
*/ */
nmdk_timer_init(); nmdk_timer_init(mtu_timer_base);
clksrc_dbx500_prcmu_init(prcmu_timer_base); clksrc_dbx500_prcmu_init(prcmu_timer_base);
} }
......
#ifndef __PLAT_MTU_H #ifndef __PLAT_MTU_H
#define __PLAT_MTU_H #define __PLAT_MTU_H
/* should be set by the platform code */ void nmdk_timer_init(void __iomem *base);
extern void __iomem *mtu_base;
void nmdk_clkevt_reset(void); void nmdk_clkevt_reset(void);
void nmdk_clksrc_reset(void); void nmdk_clksrc_reset(void);
......
...@@ -20,12 +20,6 @@ ...@@ -20,12 +20,6 @@
#include <asm/mach/time.h> #include <asm/mach/time.h>
#include <asm/sched_clock.h> #include <asm/sched_clock.h>
/*
* Guaranteed runtime conversion range in seconds for
* the clocksource and clockevent.
*/
#define MTU_MIN_RANGE 4
/* /*
* The MTU device hosts four different counters, with 4 set of * The MTU device hosts four different counters, with 4 set of
* registers. These are register names. * registers. These are register names.
...@@ -66,12 +60,11 @@ ...@@ -66,12 +60,11 @@
#define MTU_PCELL2 0xff8 #define MTU_PCELL2 0xff8
#define MTU_PCELL3 0xffC #define MTU_PCELL3 0xffC
static void __iomem *mtu_base;
static bool clkevt_periodic; static bool clkevt_periodic;
static u32 clk_prescale; static u32 clk_prescale;
static u32 nmdk_cycle; /* write-once */ static u32 nmdk_cycle; /* write-once */
void __iomem *mtu_base; /* Assigned by machine code */
#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK #ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
/* /*
* Override the global weak sched_clock symbol with this * Override the global weak sched_clock symbol with this
...@@ -103,7 +96,6 @@ static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev) ...@@ -103,7 +96,6 @@ static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
void nmdk_clkevt_reset(void) void nmdk_clkevt_reset(void)
{ {
if (clkevt_periodic) { if (clkevt_periodic) {
/* Timer: configure load and background-load, and fire it up */ /* Timer: configure load and background-load, and fire it up */
writel(nmdk_cycle, mtu_base + MTU_LR(1)); writel(nmdk_cycle, mtu_base + MTU_LR(1));
writel(nmdk_cycle, mtu_base + MTU_BGLR(1)); writel(nmdk_cycle, mtu_base + MTU_BGLR(1));
...@@ -121,7 +113,6 @@ void nmdk_clkevt_reset(void) ...@@ -121,7 +113,6 @@ void nmdk_clkevt_reset(void)
static void nmdk_clkevt_mode(enum clock_event_mode mode, static void nmdk_clkevt_mode(enum clock_event_mode mode,
struct clock_event_device *dev) struct clock_event_device *dev)
{ {
switch (mode) { switch (mode) {
case CLOCK_EVT_MODE_PERIODIC: case CLOCK_EVT_MODE_PERIODIC:
clkevt_periodic = true; clkevt_periodic = true;
...@@ -183,15 +174,16 @@ void nmdk_clksrc_reset(void) ...@@ -183,15 +174,16 @@ void nmdk_clksrc_reset(void)
mtu_base + MTU_CR(0)); mtu_base + MTU_CR(0));
} }
void __init nmdk_timer_init(void) void __init nmdk_timer_init(void __iomem *base)
{ {
unsigned long rate; unsigned long rate;
struct clk *clk0; struct clk *clk0;
mtu_base = base;
clk0 = clk_get_sys("mtu0", NULL); clk0 = clk_get_sys("mtu0", NULL);
BUG_ON(IS_ERR(clk0)); BUG_ON(IS_ERR(clk0));
BUG_ON(clk_prepare(clk0) < 0);
clk_enable(clk0); BUG_ON(clk_enable(clk0) < 0);
/* /*
* Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
...@@ -224,17 +216,8 @@ void __init nmdk_timer_init(void) ...@@ -224,17 +216,8 @@ void __init nmdk_timer_init(void)
setup_sched_clock(nomadik_read_sched_clock, 32, rate); setup_sched_clock(nomadik_read_sched_clock, 32, rate);
#endif #endif
/* Timer 1 is used for events */ /* Timer 1 is used for events, register irq and clockevents */
clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
nmdk_clkevt.max_delta_ns =
clockevent_delta2ns(0xffffffff, &nmdk_clkevt);
nmdk_clkevt.min_delta_ns =
clockevent_delta2ns(0x00000002, &nmdk_clkevt);
nmdk_clkevt.cpumask = cpumask_of(0);
/* Register irq and clockevents */
setup_irq(IRQ_MTU0, &nmdk_timer_irq); setup_irq(IRQ_MTU0, &nmdk_timer_irq);
clockevents_register_device(&nmdk_clkevt); nmdk_clkevt.cpumask = cpumask_of(0);
clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);
} }
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