Commit 7caebc8f authored by Mangesh Gadre's avatar Mangesh Gadre Committed by Alex Deucher

drm/amdgpu: Updated TCP/UTCL1 programming

Update TCP/UTCL1 thrashing control settings

v2: updated rev_id check
Signed-off-by: default avatarMangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f54e1d47
...@@ -203,6 +203,9 @@ static void gfx_v9_4_3_init_golden_registers(struct amdgpu_device *adev) ...@@ -203,6 +203,9 @@ static void gfx_v9_4_3_init_golden_registers(struct amdgpu_device *adev)
if (adev->rev_id == 0) { if (adev->rev_id == 0) {
WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1, WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1,
REDUCE_FIFO_DEPTH_BY_2, 2); REDUCE_FIFO_DEPTH_BY_2, 2);
} else {
WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL2,
SPARE, 0x1);
} }
} }
} }
......
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