Commit 92b3e2e9 authored by Daniel Drake's avatar Daniel Drake Committed by John W. Linville

[PATCH] zd1211rw: Fix E2P_PHY_REG patching

Due to conflicting/confusing defines in the vendor driver, we were
reading E2P_PHY_REG from the wrong location.

CR157 patching was slightly incorrect in that the vendor driver only
patches in an 8-bit value, whereas we were patching 24 bits.

Additionally, CR157 patching was happening on both zd1211 and zd1211b,
but this should only happen on zd1211.
Signed-off-by: default avatarDaniel Drake <dsd@gentoo.org>
Signed-off-by: default avatarUlrich Kunitz <kune@deine-taler.de>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent ae6ead46
...@@ -592,16 +592,16 @@ int zd_chip_unlock_phy_regs(struct zd_chip *chip) ...@@ -592,16 +592,16 @@ int zd_chip_unlock_phy_regs(struct zd_chip *chip)
return r; return r;
} }
/* CR157 can be optionally patched by the EEPROM */ /* CR157 can be optionally patched by the EEPROM for original ZD1211 */
static int patch_cr157(struct zd_chip *chip) static int patch_cr157(struct zd_chip *chip)
{ {
int r; int r;
u32 value; u16 value;
if (!chip->patch_cr157) if (!chip->patch_cr157)
return 0; return 0;
r = zd_ioread32_locked(chip, &value, E2P_PHY_REG); r = zd_ioread16_locked(chip, &value, E2P_PHY_REG);
if (r) if (r)
return r; return r;
...@@ -791,11 +791,6 @@ static int zd1211b_hw_reset_phy(struct zd_chip *chip) ...@@ -791,11 +791,6 @@ static int zd1211b_hw_reset_phy(struct zd_chip *chip)
goto out; goto out;
r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
if (r)
goto unlock;
r = patch_cr157(chip);
unlock:
t = zd_chip_unlock_phy_regs(chip); t = zd_chip_unlock_phy_regs(chip);
if (t && !r) if (t && !r)
r = t; r = t;
......
...@@ -641,8 +641,8 @@ enum { ...@@ -641,8 +641,8 @@ enum {
* also only 11 channels. */ * also only 11 channels. */
#define E2P_ALLOWED_CHANNEL E2P_DATA(0x18) #define E2P_ALLOWED_CHANNEL E2P_DATA(0x18)
#define E2P_PHY_REG E2P_DATA(0x1a)
#define E2P_DEVICE_VER E2P_DATA(0x20) #define E2P_DEVICE_VER E2P_DATA(0x20)
#define E2P_PHY_REG E2P_DATA(0x25)
#define E2P_36M_CAL_VALUE1 E2P_DATA(0x28) #define E2P_36M_CAL_VALUE1 E2P_DATA(0x28)
#define E2P_36M_CAL_VALUE2 E2P_DATA(0x2a) #define E2P_36M_CAL_VALUE2 E2P_DATA(0x2a)
#define E2P_36M_CAL_VALUE3 E2P_DATA(0x2c) #define E2P_36M_CAL_VALUE3 E2P_DATA(0x2c)
......
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