Commit 95c7b77d authored by Sean Christopherson's avatar Sean Christopherson Committed by Paolo Bonzini

KVM: x86: Explicitly #define the VCPU_REGS_* indices

Declaring the VCPU_REGS_* as enums allows for more robust C code, but it
prevents using the values in assembly files.  Expliciting #define the
indices in an asm-friendly file to prepare for VMX moving its transition
code to a proper assembly file, but keep the enums for general usage.
Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent d5589204
...@@ -35,6 +35,7 @@ ...@@ -35,6 +35,7 @@
#include <asm/msr-index.h> #include <asm/msr-index.h>
#include <asm/asm.h> #include <asm/asm.h>
#include <asm/kvm_page_track.h> #include <asm/kvm_page_track.h>
#include <asm/kvm_vcpu_regs.h>
#include <asm/hyperv-tlfs.h> #include <asm/hyperv-tlfs.h>
#define KVM_MAX_VCPUS 288 #define KVM_MAX_VCPUS 288
...@@ -137,23 +138,23 @@ static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) ...@@ -137,23 +138,23 @@ static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
#define ASYNC_PF_PER_VCPU 64 #define ASYNC_PF_PER_VCPU 64
enum kvm_reg { enum kvm_reg {
VCPU_REGS_RAX = 0, VCPU_REGS_RAX = __VCPU_REGS_RAX,
VCPU_REGS_RCX = 1, VCPU_REGS_RCX = __VCPU_REGS_RCX,
VCPU_REGS_RDX = 2, VCPU_REGS_RDX = __VCPU_REGS_RDX,
VCPU_REGS_RBX = 3, VCPU_REGS_RBX = __VCPU_REGS_RBX,
VCPU_REGS_RSP = 4, VCPU_REGS_RSP = __VCPU_REGS_RSP,
VCPU_REGS_RBP = 5, VCPU_REGS_RBP = __VCPU_REGS_RBP,
VCPU_REGS_RSI = 6, VCPU_REGS_RSI = __VCPU_REGS_RSI,
VCPU_REGS_RDI = 7, VCPU_REGS_RDI = __VCPU_REGS_RDI,
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64
VCPU_REGS_R8 = 8, VCPU_REGS_R8 = __VCPU_REGS_R8,
VCPU_REGS_R9 = 9, VCPU_REGS_R9 = __VCPU_REGS_R9,
VCPU_REGS_R10 = 10, VCPU_REGS_R10 = __VCPU_REGS_R10,
VCPU_REGS_R11 = 11, VCPU_REGS_R11 = __VCPU_REGS_R11,
VCPU_REGS_R12 = 12, VCPU_REGS_R12 = __VCPU_REGS_R12,
VCPU_REGS_R13 = 13, VCPU_REGS_R13 = __VCPU_REGS_R13,
VCPU_REGS_R14 = 14, VCPU_REGS_R14 = __VCPU_REGS_R14,
VCPU_REGS_R15 = 15, VCPU_REGS_R15 = __VCPU_REGS_R15,
#endif #endif
VCPU_REGS_RIP, VCPU_REGS_RIP,
NR_VCPU_REGS NR_VCPU_REGS
......
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_KVM_VCPU_REGS_H
#define _ASM_X86_KVM_VCPU_REGS_H
#define __VCPU_REGS_RAX 0
#define __VCPU_REGS_RCX 1
#define __VCPU_REGS_RDX 2
#define __VCPU_REGS_RBX 3
#define __VCPU_REGS_RSP 4
#define __VCPU_REGS_RBP 5
#define __VCPU_REGS_RSI 6
#define __VCPU_REGS_RDI 7
#ifdef CONFIG_X86_64
#define __VCPU_REGS_R8 8
#define __VCPU_REGS_R9 9
#define __VCPU_REGS_R10 10
#define __VCPU_REGS_R11 11
#define __VCPU_REGS_R12 12
#define __VCPU_REGS_R13 13
#define __VCPU_REGS_R14 14
#define __VCPU_REGS_R15 15
#endif
#endif /* _ASM_X86_KVM_VCPU_REGS_H */
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