Commit 973ca46d authored by Doug Ledford's avatar Doug Ledford

Merge remote-tracking branch 'mlx5-next/mlx5-next' into for-next

Bring in the lastest mlx5-next branch as the RDMA RX RoCE Steering
Support patch series requires it (first two patches are in mlx5-next,
final patch in RDMA tree).
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parents 868df536 e6806e9a
...@@ -324,10 +324,13 @@ create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, ...@@ -324,10 +324,13 @@ create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
/** /**
* mlx5_eq_enable - Enable EQ for receiving EQEs * mlx5_eq_enable - Enable EQ for receiving EQEs
* @dev - Device which owns the eq * @dev : Device which owns the eq
* @eq - EQ to enable * @eq : EQ to enable
* @nb - notifier call block * @nb : Notifier call block
* mlx5_eq_enable - must be called after EQ is created in device. *
* Must be called after EQ is created in device.
*
* @return: 0 if no error
*/ */
int mlx5_eq_enable(struct mlx5_core_dev *dev, struct mlx5_eq *eq, int mlx5_eq_enable(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
struct notifier_block *nb) struct notifier_block *nb)
...@@ -344,11 +347,12 @@ int mlx5_eq_enable(struct mlx5_core_dev *dev, struct mlx5_eq *eq, ...@@ -344,11 +347,12 @@ int mlx5_eq_enable(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
EXPORT_SYMBOL(mlx5_eq_enable); EXPORT_SYMBOL(mlx5_eq_enable);
/** /**
* mlx5_eq_disable - Enable EQ for receiving EQEs * mlx5_eq_disable - Disable EQ for receiving EQEs
* @dev - Device which owns the eq * @dev : Device which owns the eq
* @eq - EQ to disable * @eq : EQ to disable
* @nb - notifier call block * @nb : Notifier call block
* mlx5_eq_disable - must be called before EQ is destroyed. *
* Must be called before EQ is destroyed.
*/ */
void mlx5_eq_disable(struct mlx5_core_dev *dev, struct mlx5_eq *eq, void mlx5_eq_disable(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
struct notifier_block *nb) struct notifier_block *nb)
......
...@@ -182,7 +182,7 @@ static int mlx5_cmd_create_flow_table(struct mlx5_flow_root_namespace *ns, ...@@ -182,7 +182,7 @@ static int mlx5_cmd_create_flow_table(struct mlx5_flow_root_namespace *ns,
} else { } else {
MLX5_SET(create_flow_table_in, in, MLX5_SET(create_flow_table_in, in,
flow_table_context.table_miss_action, flow_table_context.table_miss_action,
ns->def_miss_action); ft->def_miss_action);
} }
break; break;
...@@ -262,7 +262,7 @@ static int mlx5_cmd_modify_flow_table(struct mlx5_flow_root_namespace *ns, ...@@ -262,7 +262,7 @@ static int mlx5_cmd_modify_flow_table(struct mlx5_flow_root_namespace *ns,
} else { } else {
MLX5_SET(modify_flow_table_in, in, MLX5_SET(modify_flow_table_in, in,
flow_table_context.table_miss_action, flow_table_context.table_miss_action,
ns->def_miss_action); ft->def_miss_action);
} }
} }
......
...@@ -60,7 +60,8 @@ ...@@ -60,7 +60,8 @@
ADD_PRIO(num_prios_val, 0, num_levels_val, {},\ ADD_PRIO(num_prios_val, 0, num_levels_val, {},\
__VA_ARGS__)\ __VA_ARGS__)\
#define ADD_NS(...) {.type = FS_TYPE_NAMESPACE,\ #define ADD_NS(def_miss_act, ...) {.type = FS_TYPE_NAMESPACE, \
.def_miss_action = def_miss_act,\
.children = (struct init_tree_node[]) {__VA_ARGS__},\ .children = (struct init_tree_node[]) {__VA_ARGS__},\
.ar_size = INIT_TREE_NODE_ARRAY_SIZE(__VA_ARGS__) \ .ar_size = INIT_TREE_NODE_ARRAY_SIZE(__VA_ARGS__) \
} }
...@@ -131,33 +132,41 @@ static struct init_tree_node { ...@@ -131,33 +132,41 @@ static struct init_tree_node {
int num_leaf_prios; int num_leaf_prios;
int prio; int prio;
int num_levels; int num_levels;
enum mlx5_flow_table_miss_action def_miss_action;
} root_fs = { } root_fs = {
.type = FS_TYPE_NAMESPACE, .type = FS_TYPE_NAMESPACE,
.ar_size = 7, .ar_size = 7,
.children = (struct init_tree_node[]) { .children = (struct init_tree_node[]){
ADD_PRIO(0, BY_PASS_MIN_LEVEL, 0, ADD_PRIO(0, BY_PASS_MIN_LEVEL, 0, FS_CHAINING_CAPS,
FS_CHAINING_CAPS, ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
ADD_NS(ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_PRIOS, ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_PRIOS,
BY_PASS_PRIO_NUM_LEVELS))), BY_PASS_PRIO_NUM_LEVELS))),
ADD_PRIO(0, LAG_MIN_LEVEL, 0, ADD_PRIO(0, LAG_MIN_LEVEL, 0, FS_CHAINING_CAPS,
FS_CHAINING_CAPS, ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
ADD_NS(ADD_MULTIPLE_PRIO(LAG_NUM_PRIOS, ADD_MULTIPLE_PRIO(LAG_NUM_PRIOS,
LAG_PRIO_NUM_LEVELS))), LAG_PRIO_NUM_LEVELS))),
ADD_PRIO(0, OFFLOADS_MIN_LEVEL, 0, {}, ADD_PRIO(0, OFFLOADS_MIN_LEVEL, 0, {},
ADD_NS(ADD_MULTIPLE_PRIO(OFFLOADS_NUM_PRIOS, OFFLOADS_MAX_FT))), ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
ADD_PRIO(0, ETHTOOL_MIN_LEVEL, 0, ADD_MULTIPLE_PRIO(OFFLOADS_NUM_PRIOS,
FS_CHAINING_CAPS, OFFLOADS_MAX_FT))),
ADD_NS(ADD_MULTIPLE_PRIO(ETHTOOL_NUM_PRIOS, ADD_PRIO(0, ETHTOOL_MIN_LEVEL, 0, FS_CHAINING_CAPS,
ETHTOOL_PRIO_NUM_LEVELS))), ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
ADD_PRIO(0, KERNEL_MIN_LEVEL, 0, {}, ADD_MULTIPLE_PRIO(ETHTOOL_NUM_PRIOS,
ADD_NS(ADD_MULTIPLE_PRIO(KERNEL_NIC_TC_NUM_PRIOS, KERNEL_NIC_TC_NUM_LEVELS), ETHTOOL_PRIO_NUM_LEVELS))),
ADD_MULTIPLE_PRIO(KERNEL_NIC_NUM_PRIOS, ADD_PRIO(0, KERNEL_MIN_LEVEL, 0, {},
KERNEL_NIC_PRIO_NUM_LEVELS))), ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
ADD_PRIO(0, BY_PASS_MIN_LEVEL, 0, ADD_MULTIPLE_PRIO(KERNEL_NIC_TC_NUM_PRIOS,
FS_CHAINING_CAPS, KERNEL_NIC_TC_NUM_LEVELS),
ADD_NS(ADD_MULTIPLE_PRIO(LEFTOVERS_NUM_PRIOS, LEFTOVERS_NUM_LEVELS))), ADD_MULTIPLE_PRIO(KERNEL_NIC_NUM_PRIOS,
ADD_PRIO(0, ANCHOR_MIN_LEVEL, 0, {}, KERNEL_NIC_PRIO_NUM_LEVELS))),
ADD_NS(ADD_MULTIPLE_PRIO(ANCHOR_NUM_PRIOS, ANCHOR_NUM_LEVELS))), ADD_PRIO(0, BY_PASS_MIN_LEVEL, 0, FS_CHAINING_CAPS,
ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
ADD_MULTIPLE_PRIO(LEFTOVERS_NUM_PRIOS,
LEFTOVERS_NUM_LEVELS))),
ADD_PRIO(0, ANCHOR_MIN_LEVEL, 0, {},
ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
ADD_MULTIPLE_PRIO(ANCHOR_NUM_PRIOS,
ANCHOR_NUM_LEVELS))),
} }
}; };
...@@ -167,8 +176,29 @@ static struct init_tree_node egress_root_fs = { ...@@ -167,8 +176,29 @@ static struct init_tree_node egress_root_fs = {
.children = (struct init_tree_node[]) { .children = (struct init_tree_node[]) {
ADD_PRIO(0, MLX5_BY_PASS_NUM_PRIOS, 0, ADD_PRIO(0, MLX5_BY_PASS_NUM_PRIOS, 0,
FS_CHAINING_CAPS_EGRESS, FS_CHAINING_CAPS_EGRESS,
ADD_NS(ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_PRIOS, ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_PRIOS,
BY_PASS_PRIO_NUM_LEVELS))),
}
};
#define RDMA_RX_BYPASS_PRIO 0
#define RDMA_RX_KERNEL_PRIO 1
static struct init_tree_node rdma_rx_root_fs = {
.type = FS_TYPE_NAMESPACE,
.ar_size = 2,
.children = (struct init_tree_node[]) {
[RDMA_RX_BYPASS_PRIO] =
ADD_PRIO(0, MLX5_BY_PASS_NUM_REGULAR_PRIOS, 0,
FS_CHAINING_CAPS,
ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_REGULAR_PRIOS,
BY_PASS_PRIO_NUM_LEVELS))), BY_PASS_PRIO_NUM_LEVELS))),
[RDMA_RX_KERNEL_PRIO] =
ADD_PRIO(0, MLX5_BY_PASS_NUM_REGULAR_PRIOS + 1, 0,
FS_CHAINING_CAPS,
ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_SWITCH_DOMAIN,
ADD_MULTIPLE_PRIO(1, 1))),
} }
}; };
...@@ -1014,6 +1044,7 @@ static struct mlx5_flow_table *__mlx5_create_flow_table(struct mlx5_flow_namespa ...@@ -1014,6 +1044,7 @@ static struct mlx5_flow_table *__mlx5_create_flow_table(struct mlx5_flow_namespa
tree_init_node(&ft->node, del_hw_flow_table, del_sw_flow_table); tree_init_node(&ft->node, del_hw_flow_table, del_sw_flow_table);
log_table_sz = ft->max_fte ? ilog2(ft->max_fte) : 0; log_table_sz = ft->max_fte ? ilog2(ft->max_fte) : 0;
next_ft = find_next_chained_ft(fs_prio); next_ft = find_next_chained_ft(fs_prio);
ft->def_miss_action = ns->def_miss_action;
err = root->cmds->create_flow_table(root, ft, log_table_sz, next_ft); err = root->cmds->create_flow_table(root, ft, log_table_sz, next_ft);
if (err) if (err)
goto free_ft; goto free_ft;
...@@ -2056,16 +2087,18 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev, ...@@ -2056,16 +2087,18 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,
if (steering->sniffer_tx_root_ns) if (steering->sniffer_tx_root_ns)
return &steering->sniffer_tx_root_ns->ns; return &steering->sniffer_tx_root_ns->ns;
return NULL; return NULL;
case MLX5_FLOW_NAMESPACE_RDMA_RX:
if (steering->rdma_rx_root_ns)
return &steering->rdma_rx_root_ns->ns;
return NULL;
default: default:
break; break;
} }
if (type == MLX5_FLOW_NAMESPACE_EGRESS) { if (type == MLX5_FLOW_NAMESPACE_EGRESS) {
root_ns = steering->egress_root_ns; root_ns = steering->egress_root_ns;
} else if (type == MLX5_FLOW_NAMESPACE_RDMA_RX) {
root_ns = steering->rdma_rx_root_ns;
prio = RDMA_RX_BYPASS_PRIO;
} else if (type == MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL) {
root_ns = steering->rdma_rx_root_ns;
prio = RDMA_RX_KERNEL_PRIO;
} else { /* Must be NIC RX */ } else { /* Must be NIC RX */
root_ns = steering->root_ns; root_ns = steering->root_ns;
prio = type; prio = type;
...@@ -2155,7 +2188,8 @@ static struct mlx5_flow_namespace *fs_init_namespace(struct mlx5_flow_namespace ...@@ -2155,7 +2188,8 @@ static struct mlx5_flow_namespace *fs_init_namespace(struct mlx5_flow_namespace
return ns; return ns;
} }
static struct mlx5_flow_namespace *fs_create_namespace(struct fs_prio *prio) static struct mlx5_flow_namespace *fs_create_namespace(struct fs_prio *prio,
int def_miss_act)
{ {
struct mlx5_flow_namespace *ns; struct mlx5_flow_namespace *ns;
...@@ -2164,6 +2198,7 @@ static struct mlx5_flow_namespace *fs_create_namespace(struct fs_prio *prio) ...@@ -2164,6 +2198,7 @@ static struct mlx5_flow_namespace *fs_create_namespace(struct fs_prio *prio)
return ERR_PTR(-ENOMEM); return ERR_PTR(-ENOMEM);
fs_init_namespace(ns); fs_init_namespace(ns);
ns->def_miss_action = def_miss_act;
tree_init_node(&ns->node, NULL, del_sw_ns); tree_init_node(&ns->node, NULL, del_sw_ns);
tree_add_node(&ns->node, &prio->node); tree_add_node(&ns->node, &prio->node);
list_add_tail(&ns->node.list, &prio->node.children); list_add_tail(&ns->node.list, &prio->node.children);
...@@ -2230,7 +2265,7 @@ static int init_root_tree_recursive(struct mlx5_flow_steering *steering, ...@@ -2230,7 +2265,7 @@ static int init_root_tree_recursive(struct mlx5_flow_steering *steering,
base = &fs_prio->node; base = &fs_prio->node;
} else if (init_node->type == FS_TYPE_NAMESPACE) { } else if (init_node->type == FS_TYPE_NAMESPACE) {
fs_get_obj(fs_prio, fs_parent_node); fs_get_obj(fs_prio, fs_parent_node);
fs_ns = fs_create_namespace(fs_prio); fs_ns = fs_create_namespace(fs_prio, init_node->def_miss_action);
if (IS_ERR(fs_ns)) if (IS_ERR(fs_ns))
return PTR_ERR(fs_ns); return PTR_ERR(fs_ns);
base = &fs_ns->node; base = &fs_ns->node;
...@@ -2494,18 +2529,25 @@ static int init_sniffer_rx_root_ns(struct mlx5_flow_steering *steering) ...@@ -2494,18 +2529,25 @@ static int init_sniffer_rx_root_ns(struct mlx5_flow_steering *steering)
static int init_rdma_rx_root_ns(struct mlx5_flow_steering *steering) static int init_rdma_rx_root_ns(struct mlx5_flow_steering *steering)
{ {
struct fs_prio *prio; int err;
steering->rdma_rx_root_ns = create_root_ns(steering, FS_FT_RDMA_RX); steering->rdma_rx_root_ns = create_root_ns(steering, FS_FT_RDMA_RX);
if (!steering->rdma_rx_root_ns) if (!steering->rdma_rx_root_ns)
return -ENOMEM; return -ENOMEM;
steering->rdma_rx_root_ns->def_miss_action = err = init_root_tree(steering, &rdma_rx_root_fs,
MLX5_FLOW_TABLE_MISS_ACTION_SWITCH_DOMAIN; &steering->rdma_rx_root_ns->ns.node);
if (err)
goto out_err;
/* Create single prio */ set_prio_attrs(steering->rdma_rx_root_ns);
prio = fs_create_prio(&steering->rdma_rx_root_ns->ns, 0, 1);
return PTR_ERR_OR_ZERO(prio); return 0;
out_err:
cleanup_root_ns(steering->rdma_rx_root_ns);
steering->rdma_rx_root_ns = NULL;
return err;
} }
static int init_fdb_root_ns(struct mlx5_flow_steering *steering) static int init_fdb_root_ns(struct mlx5_flow_steering *steering)
{ {
...@@ -2543,7 +2585,7 @@ static int init_fdb_root_ns(struct mlx5_flow_steering *steering) ...@@ -2543,7 +2585,7 @@ static int init_fdb_root_ns(struct mlx5_flow_steering *steering)
} }
for (chain = 0; chain <= FDB_MAX_CHAIN; chain++) { for (chain = 0; chain <= FDB_MAX_CHAIN; chain++) {
ns = fs_create_namespace(maj_prio); ns = fs_create_namespace(maj_prio, MLX5_FLOW_TABLE_MISS_ACTION_DEF);
if (IS_ERR(ns)) { if (IS_ERR(ns)) {
err = PTR_ERR(ns); err = PTR_ERR(ns);
goto out_err; goto out_err;
......
...@@ -145,6 +145,7 @@ struct mlx5_flow_table { ...@@ -145,6 +145,7 @@ struct mlx5_flow_table {
struct list_head fwd_rules; struct list_head fwd_rules;
u32 flags; u32 flags;
struct rhltable fgs_hash; struct rhltable fgs_hash;
enum mlx5_flow_table_miss_action def_miss_action;
}; };
struct mlx5_ft_underlay_qp { struct mlx5_ft_underlay_qp {
...@@ -191,6 +192,7 @@ struct fs_prio { ...@@ -191,6 +192,7 @@ struct fs_prio {
struct mlx5_flow_namespace { struct mlx5_flow_namespace {
/* parent == NULL => root ns */ /* parent == NULL => root ns */
struct fs_node node; struct fs_node node;
enum mlx5_flow_table_miss_action def_miss_action;
}; };
struct mlx5_flow_group_mask { struct mlx5_flow_group_mask {
...@@ -219,7 +221,6 @@ struct mlx5_flow_root_namespace { ...@@ -219,7 +221,6 @@ struct mlx5_flow_root_namespace {
struct mutex chain_lock; struct mutex chain_lock;
struct list_head underlay_qpns; struct list_head underlay_qpns;
const struct mlx5_flow_cmds *cmds; const struct mlx5_flow_cmds *cmds;
enum mlx5_flow_table_miss_action def_miss_action;
}; };
int mlx5_init_fc_stats(struct mlx5_core_dev *dev); int mlx5_init_fc_stats(struct mlx5_core_dev *dev);
......
...@@ -2,6 +2,7 @@ ...@@ -2,6 +2,7 @@
// Copyright (c) 2019 Mellanox Technologies. // Copyright (c) 2019 Mellanox Technologies.
#include "mlx5_core.h" #include "mlx5_core.h"
#include "lib/mlx5.h"
int mlx5_create_encryption_key(struct mlx5_core_dev *mdev, int mlx5_create_encryption_key(struct mlx5_core_dev *mdev,
void *key, u32 sz_bytes, void *key, u32 sz_bytes,
......
...@@ -51,7 +51,7 @@ static int mlx5_rdma_enable_roce_steering(struct mlx5_core_dev *dev) ...@@ -51,7 +51,7 @@ static int mlx5_rdma_enable_roce_steering(struct mlx5_core_dev *dev)
return -ENOMEM; return -ENOMEM;
} }
ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_RDMA_RX); ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL);
if (!ns) { if (!ns) {
mlx5_core_err(dev, "Failed to get RDMA RX namespace"); mlx5_core_err(dev, "Failed to get RDMA RX namespace");
err = -EOPNOTSUPP; err = -EOPNOTSUPP;
......
...@@ -75,6 +75,7 @@ enum mlx5_flow_namespace_type { ...@@ -75,6 +75,7 @@ enum mlx5_flow_namespace_type {
MLX5_FLOW_NAMESPACE_SNIFFER_TX, MLX5_FLOW_NAMESPACE_SNIFFER_TX,
MLX5_FLOW_NAMESPACE_EGRESS, MLX5_FLOW_NAMESPACE_EGRESS,
MLX5_FLOW_NAMESPACE_RDMA_RX, MLX5_FLOW_NAMESPACE_RDMA_RX,
MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL,
}; };
enum { enum {
......
...@@ -808,7 +808,9 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits { ...@@ -808,7 +808,9 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
u8 swp_csum[0x1]; u8 swp_csum[0x1];
u8 swp_lso[0x1]; u8 swp_lso[0x1];
u8 cqe_checksum_full[0x1]; u8 cqe_checksum_full[0x1];
u8 reserved_at_24[0xc]; u8 reserved_at_24[0x5];
u8 tunnel_stateless_ip_over_ip[0x1];
u8 reserved_at_2a[0x6];
u8 max_vxlan_udp_ports[0x8]; u8 max_vxlan_udp_ports[0x8];
u8 reserved_at_38[0x6]; u8 reserved_at_38[0x6];
u8 max_geneve_opt_len[0x1]; u8 max_geneve_opt_len[0x1];
...@@ -1116,7 +1118,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { ...@@ -1116,7 +1118,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 cache_line_128byte[0x1]; u8 cache_line_128byte[0x1];
u8 reserved_at_165[0x4]; u8 reserved_at_165[0x4];
u8 rts2rts_qp_counters_set_id[0x1]; u8 rts2rts_qp_counters_set_id[0x1];
u8 reserved_at_16a[0x5]; u8 reserved_at_16a[0x2];
u8 vnic_env_int_rq_oob[0x1];
u8 reserved_at_16d[0x2];
u8 qcam_reg[0x1]; u8 qcam_reg[0x1];
u8 gid_table_size[0x10]; u8 gid_table_size[0x10];
...@@ -1245,7 +1249,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { ...@@ -1245,7 +1249,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 reserved_at_263[0x8]; u8 reserved_at_263[0x8];
u8 log_bf_reg_size[0x5]; u8 log_bf_reg_size[0x5];
u8 reserved_at_270[0xb]; u8 reserved_at_270[0x8];
u8 lag_tx_port_affinity[0x1];
u8 reserved_at_279[0x2];
u8 lag_master[0x1]; u8 lag_master[0x1];
u8 num_lag_ports[0x4]; u8 num_lag_ports[0x4];
...@@ -2772,7 +2778,11 @@ struct mlx5_ifc_vnic_diagnostic_statistics_bits { ...@@ -2772,7 +2778,11 @@ struct mlx5_ifc_vnic_diagnostic_statistics_bits {
u8 transmit_discard_vport_down[0x40]; u8 transmit_discard_vport_down[0x40];
u8 reserved_at_140[0xec0]; u8 reserved_at_140[0xa0];
u8 internal_rq_out_of_buffer[0x20];
u8 reserved_at_200[0xe00];
}; };
struct mlx5_ifc_traffic_counter_bits { struct mlx5_ifc_traffic_counter_bits {
......
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