Commit 9df15d84 authored by Alain Volmat's avatar Alain Volmat Committed by Mark Brown

spi: stm32: make SPI_MASTER_MUST_TX flags only specific to STM32F4

Commit 61367d0b ("spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4")
allowed to properly communicate with the st-gyro-spi even when
there is no tx_buf provided by setting the flag SPI_MASTER_MUST_TX and
thus forcing a dummy TX buffer to work in Full Duplex.
This behavior should kept only for the STM32F4 and not for other
compatible since the STM32H7 do support SIMPLEX_RX and SIMPLEX_TX.
Add the flags variable within the struct stm32_spi_cfg so that flags
used at master registration time are compatible specific.

Fixes: 61367d0b ("spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4")
Signed-off-by: default avatarAlain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/20220119093245.624878-3-alain.volmat@foss.st.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 3cefddb7
...@@ -231,6 +231,7 @@ struct stm32_spi; ...@@ -231,6 +231,7 @@ struct stm32_spi;
* @baud_rate_div_min: minimum baud rate divisor * @baud_rate_div_min: minimum baud rate divisor
* @baud_rate_div_max: maximum baud rate divisor * @baud_rate_div_max: maximum baud rate divisor
* @has_fifo: boolean to know if fifo is used for driver * @has_fifo: boolean to know if fifo is used for driver
* @flags: compatible specific SPI controller flags used at registration time
*/ */
struct stm32_spi_cfg { struct stm32_spi_cfg {
const struct stm32_spi_regspec *regs; const struct stm32_spi_regspec *regs;
...@@ -251,6 +252,7 @@ struct stm32_spi_cfg { ...@@ -251,6 +252,7 @@ struct stm32_spi_cfg {
unsigned int baud_rate_div_min; unsigned int baud_rate_div_min;
unsigned int baud_rate_div_max; unsigned int baud_rate_div_max;
bool has_fifo; bool has_fifo;
u16 flags;
}; };
/** /**
...@@ -1720,6 +1722,7 @@ static const struct stm32_spi_cfg stm32f4_spi_cfg = { ...@@ -1720,6 +1722,7 @@ static const struct stm32_spi_cfg stm32f4_spi_cfg = {
.baud_rate_div_min = STM32F4_SPI_BR_DIV_MIN, .baud_rate_div_min = STM32F4_SPI_BR_DIV_MIN,
.baud_rate_div_max = STM32F4_SPI_BR_DIV_MAX, .baud_rate_div_max = STM32F4_SPI_BR_DIV_MAX,
.has_fifo = false, .has_fifo = false,
.flags = SPI_MASTER_MUST_TX,
}; };
static const struct stm32_spi_cfg stm32h7_spi_cfg = { static const struct stm32_spi_cfg stm32h7_spi_cfg = {
...@@ -1852,7 +1855,7 @@ static int stm32_spi_probe(struct platform_device *pdev) ...@@ -1852,7 +1855,7 @@ static int stm32_spi_probe(struct platform_device *pdev)
master->prepare_message = stm32_spi_prepare_msg; master->prepare_message = stm32_spi_prepare_msg;
master->transfer_one = stm32_spi_transfer_one; master->transfer_one = stm32_spi_transfer_one;
master->unprepare_message = stm32_spi_unprepare_msg; master->unprepare_message = stm32_spi_unprepare_msg;
master->flags = SPI_MASTER_MUST_TX; master->flags = spi->cfg->flags;
spi->dma_tx = dma_request_chan(spi->dev, "tx"); spi->dma_tx = dma_request_chan(spi->dev, "tx");
if (IS_ERR(spi->dma_tx)) { if (IS_ERR(spi->dma_tx)) {
......
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