Commit a101ba85 authored by Alexander Stein's avatar Alexander Stein Committed by Shawn Guo

ARM: dts: imx6qdl: Add HDMI to TQMa6x/MBa6

This adds support for a COTS monitor connected to X17.
4k monitors can be used, but are limited to 1080p.
Signed-off-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 171342e6
...@@ -192,6 +192,13 @@ ethphy: ethernet-phy@3 { ...@@ -192,6 +192,13 @@ ethphy: ethernet-phy@3 {
}; };
}; };
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi>;
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c1 { &i2c1 {
tlv320aic32x4: audio-codec@18 { tlv320aic32x4: audio-codec@18 {
compatible = "ti,tlv320aic32x4"; compatible = "ti,tlv320aic32x4";
...@@ -205,6 +212,17 @@ tlv320aic32x4: audio-codec@18 { ...@@ -205,6 +212,17 @@ tlv320aic32x4: audio-codec@18 {
}; };
}; };
/* DDC */
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_recovery>;
scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
&pcie { &pcie {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>; pinctrl-0 = <&pinctrl_pcie>;
...@@ -411,6 +429,15 @@ MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb099 /* LED V16 */ ...@@ -411,6 +429,15 @@ MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb099 /* LED V16 */
>; >;
}; };
pinctrl_hdmi: hdmigrp {
/* NOTE: DDC is done via I2C2, so DON'T
* configure DDC pins for HDMI!
*/
fsl,pins = <
MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099
...@@ -447,6 +474,20 @@ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x0001b099 ...@@ -447,6 +474,20 @@ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x0001b099
>; >;
}; };
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b899
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b899
>;
};
pinctrl_i2c2_recovery: i2c2recoverygrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b899
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b899
>;
};
pinctrl_pcie: pciegrp { pinctrl_pcie: pciegrp {
fsl,pins = < fsl,pins = <
/* HYS = 1, DSE = 110, 100k up, SPEED = HIGH (11)*/ /* HYS = 1, DSE = 110, 100k up, SPEED = HIGH (11)*/
......
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