Commit ab3040e1 authored by 周琰杰 (Zhou Yanjie)'s avatar 周琰杰 (Zhou Yanjie) Committed by Thomas Bogendoerfer

MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.

Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic.
Signed-off-by: default avatar周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: default avatarPaul Cercueil <paul@crapouillou.net>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent 2bc434b1
...@@ -80,6 +80,11 @@ rng: rng@d8 { ...@@ -80,6 +80,11 @@ rng: rng@d8 {
status = "disabled"; status = "disabled";
}; };
mac_phy_ctrl: mac-phy-ctrl@e8 {
compatible = "syscon";
reg = <0xe8 0x4>;
};
}; };
ost: timer@12000000 { ost: timer@12000000 {
...@@ -347,6 +352,8 @@ mac: ethernet@134b0000 { ...@@ -347,6 +352,8 @@ mac: ethernet@134b0000 {
clocks = <&cgu X1000_CLK_MAC>; clocks = <&cgu X1000_CLK_MAC>;
clock-names = "stmmaceth"; clock-names = "stmmaceth";
mode-reg = <&mac_phy_ctrl>;
status = "disabled"; status = "disabled";
mdio: mdio { mdio: mdio {
......
...@@ -73,6 +73,11 @@ otg_phy: usb-phy@3c { ...@@ -73,6 +73,11 @@ otg_phy: usb-phy@3c {
status = "disabled"; status = "disabled";
}; };
mac_phy_ctrl: mac-phy-ctrl@e8 {
compatible = "syscon";
reg = <0xe8 0x4>;
};
}; };
ost: timer@12000000 { ost: timer@12000000 {
...@@ -336,6 +341,8 @@ mac: ethernet@134b0000 { ...@@ -336,6 +341,8 @@ mac: ethernet@134b0000 {
clocks = <&cgu X1830_CLK_MAC>; clocks = <&cgu X1830_CLK_MAC>;
clock-names = "stmmaceth"; clock-names = "stmmaceth";
mode-reg = <&mac_phy_ctrl>;
status = "disabled"; status = "disabled";
mdio: mdio { mdio: mdio {
......
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