Commit ac4ddad6 authored by Kristina Martšenko's avatar Kristina Martšenko Committed by Greg Kroah-Hartman

staging: winbond: remove driver

The driver hasn't been cleaned up and nobody is working to do so, so
remove it.
Signed-off-by: default avatarKristina Martšenko <kristina.martsenko@gmail.com>
Cc: Pavel Machek <pavel@ucw.cz>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c0cd6e5b
......@@ -8631,11 +8631,6 @@ M: Forest Bond <forest@alittletooquiet.net>
S: Odd Fixes
F: drivers/staging/vt665?/
STAGING - WINBOND IS89C35 WLAN USB DRIVER
M: Pavel Machek <pavel@ucw.cz>
S: Odd Fixes
F: drivers/staging/winbond/
STAGING - XGI Z7,Z9,Z11 PCI DISPLAY DRIVER
M: Arnaud Patard <arnaud.patard@rtp-net.org>
S: Odd Fixes
......
......@@ -30,8 +30,6 @@ source "drivers/staging/slicoss/Kconfig"
source "drivers/staging/usbip/Kconfig"
source "drivers/staging/winbond/Kconfig"
source "drivers/staging/wlan-ng/Kconfig"
source "drivers/staging/comedi/Kconfig"
......
......@@ -7,7 +7,6 @@ obj-y += media/
obj-$(CONFIG_ET131X) += et131x/
obj-$(CONFIG_SLICOSS) += slicoss/
obj-$(CONFIG_USBIP_CORE) += usbip/
obj-$(CONFIG_W35UND) += winbond/
obj-$(CONFIG_PRISM2_USB) += wlan-ng/
obj-$(CONFIG_COMEDI) += comedi/
obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/
......
config W35UND
tristate "IS89C35 WLAN USB driver"
depends on MAC80211 && WLAN && USB
default n
---help---
This is highly experimental driver for Winbond WIFI card.
Hardware is present in some Kohjinsha subnotebooks, and in some
stand-alone USB modules. Chipset name seems to be w89c35d.
Check <http://code.google.com/p/winbondport/> for new version.
w35und-y := \
mds.o \
mto.o \
phy_calibration.o \
reg.o \
wb35reg.o \
wb35rx.o \
wb35tx.o \
wbusb.o \
obj-$(CONFIG_W35UND) += w35und.o
TODO:
- sparse cleanups
- checkpatch cleanups
- kerneldoc cleanups
- fix severeCamelCaseInfestation
- remove unused ioctls
- use cfg80211 for regulatory stuff
- fix 4k stack problems
- fix locking problems (it's done using atomics...)
Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
Pavel Machek <pavel@ucw.cz>
#ifndef __WINBOND_CORE_H
#define __WINBOND_CORE_H
#include <linux/wireless.h>
#include <linux/types.h>
#include <linux/delay.h>
#include "wbhal.h"
#include "mto.h"
#include "mac_structures.h"
#include "mds_s.h"
#define MAX_NUM_TX_MMPDU 2
#define MAX_MMPDU_SIZE 1512
#define MAX_NUM_RX_MMPDU 6
struct mlme_frame {
s8 *pMMPDU;
u16 len;
u8 data_type;
u8 is_in_used;
u8 TxMMPDU[MAX_NUM_TX_MMPDU][MAX_MMPDU_SIZE];
u8 TxMMPDUInUse[(MAX_NUM_TX_MMPDU + 3) & ~0x03];
u16 wNumTxMMPDU;
u16 wNumTxMMPDUDiscarded;
u8 RxMMPDU[MAX_NUM_RX_MMPDU][MAX_MMPDU_SIZE];
u8 SaveRxBufSlotInUse[(MAX_NUM_RX_MMPDU + 3) & ~0x03];
u16 wNumRxMMPDU;
u16 wNumRxMMPDUDiscarded;
u16 wNumRxMMPDUInMLME; /* Number of the Rx MMPDU */
u16 reserved_1; /* in MLME. */
/* excluding the discarded */
};
#define WBLINUX_PACKET_ARRAY_SIZE (ETHERNET_TX_DESCRIPTORS*4)
#define WB_MAX_LINK_NAME_LEN 40
struct wbsoft_priv {
struct wb_local_para sLocalPara; /* Myself connected
parameters */
struct mlme_frame sMlmeFrame; /* connect to peerSTA parameters */
struct wb35_mto_params sMtoPara; /* MTO_struct ... */
struct hw_data sHwData; /*For HAL */
struct wb35_mds Mds;
u32 RxByteCount;
u32 TxByteCount;
bool enabled;
};
#endif /* __WINBOND_CORE_H */
#ifndef __WINBOND_LOCALPARA_H
#define __WINBOND_LOCALPARA_H
/*
* =============================================================
* LocalPara.h -
* =============================================================
*/
#include "mac_structures.h"
/* Define the local ability */
#define LOCAL_DEFAULT_BEACON_PERIOD 100 /* ms */
#define LOCAL_DEFAULT_ATIM_WINDOW 0
#define LOCAL_DEFAULT_ERP_CAPABILITY 0x0431 /*
* 0x0001: ESS
* 0x0010: Privacy
* 0x0020: short preamble
* 0x0400: short slot time
*/
#define LOCAL_DEFAULT_LISTEN_INTERVAL 5
#define LOCAL_DEFAULT_24_CHANNEL_NUM 13 /* channel 1..13 */
#define LOCAL_DEFAULT_5_CHANNEL_NUM 8 /* channel 36..64 */
#define LOCAL_USA_24_CHANNEL_NUM 11
#define LOCAL_USA_5_CHANNEL_NUM 12
#define LOCAL_EUROPE_24_CHANNEL_NUM 13
#define LOCAL_EUROPE_5_CHANNEL_NUM 19
#define LOCAL_JAPAN_24_CHANNEL_NUM 14
#define LOCAL_JAPAN_5_CHANNEL_NUM 11
#define LOCAL_UNKNOWN_24_CHANNEL_NUM 14
#define LOCAL_UNKNOWN_5_CHANNEL_NUM 34 /* not include 165 */
#define psLOCAL (&(adapter->sLocalPara))
#define MODE_802_11_BG 0
#define MODE_802_11_A 1
#define MODE_802_11_ABG 2
#define MODE_802_11_BG_IBSS 3
#define MODE_802_11_B 4
#define MODE_AUTO 255
#define BAND_TYPE_DSSS 0
#define BAND_TYPE_OFDM_24 1
#define BAND_TYPE_OFDM_5 2
/* refer Bitmap2RateValue table */
/* the bitmap value of all the H/W supported rates: */
/* 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 */
#define LOCAL_ALL_SUPPORTED_RATES_BITMAP 0x130c1a66
/* the bitmap value of all the H/W supported rates except to non-OFDM rates: */
/* 6, 9, 12, 18, 24, 36, 48, 54 */
#define LOCAL_OFDM_SUPPORTED_RATES_BITMAP 0x130c1240
#define LOCAL_11B_SUPPORTED_RATE_BITMAP 0x826
#define LOCAL_11B_BASIC_RATE_BITMAP 0x826
#define LOCAL_11B_OPERATION_RATE_BITMAP 0x826
#define LOCAL_11G_BASIC_RATE_BITMAP 0x826 /* 1, 2, 5.5, 11 */
#define LOCAL_11G_OPERATION_RATE_BITMAP 0x130c1240 /* 6, 9, 12, 18,
* 24, 36, 48, 54
*/
#define LOCAL_11A_BASIC_RATE_BITMAP 0x01001040 /* 6, 12, 24 */
#define LOCAL_11A_OPERATION_RATE_BITMAP 0x120c0200 /* 9, 18, 36,
* 48, 54
*/
#define PWR_ACTIVE 0
#define PWR_SAVE 1
#define PWR_TX_IDLE_CYCLE 6
/* bPreambleMode and bSlotTimeMode */
#define AUTO_MODE 0
#define LONG_MODE 1
/* Region definition */
#define REGION_AUTO 0xff
#define REGION_UNKNOWN 0
#define REGION_EUROPE 1 /* ETSI */
#define REGION_JAPAN 2 /* MKK */
#define REGION_USA 3 /* FCC */
#define REGION_FRANCE 4 /* FRANCE */
#define REGION_SPAIN 5 /* SPAIN */
#define REGION_ISRAEL 6 /* ISRAEL */
#define MAX_BSS_DESCRIPT_ELEMENT 32
#define MAX_PMKID_CandidateList 16
/*
* High byte : Event number, low byte : reason
* Event definition
* -- SME/MLME event
*/
#define EVENT_RCV_DEAUTH 0x0100
#define EVENT_JOIN_FAIL 0x0200
#define EVENT_AUTH_FAIL 0x0300
#define EVENT_ASSOC_FAIL 0x0400
#define EVENT_LOST_SIGNAL 0x0500
#define EVENT_BSS_DESCRIPT_LACK 0x0600
#define EVENT_COUNTERMEASURE 0x0700
#define EVENT_JOIN_FILTER 0x0800
/* -- TX/RX event */
#define EVENT_RX_BUFF_UNAVAILABLE 0x4100
#define EVENT_CONNECT 0x8100
#define EVENT_DISCONNECT 0x8200
#define EVENT_SCAN_REQ 0x8300
/* Reason of Event */
#define EVENT_REASON_FILTER_BASIC_RATE 0x0001
#define EVENT_REASON_FILTER_PRIVACY 0x0002
#define EVENT_REASON_FILTER_AUTH_MODE 0x0003
#define EVENT_REASON_TIMEOUT 0x00ff
/* Due to[E id][Length][OUI][Data] may be 257 bytes */
#define MAX_IE_APPEND_SIZE (256 + 4)
struct chan_info {
u8 band;
u8 ChanNo;
};
struct radio_off {
u8 boHwRadioOff;
u8 boSwRadioOff;
};
struct wb_local_para {
/* read from EPROM, manufacture set for each NetCard */
u8 PermanentAddress[MAC_ADDR_LENGTH + 2];
/* the driver will use this one actually. */
u8 ThisMacAddress[MAC_ADDR_LENGTH + 2];
u32 MTUsize; /* Ind to Uplayer, Max transmission unit size */
u8 region_INF; /* region setting from INF */
u8 region; /* real region setting of the device */
u8 Reserved_1[2];
/* power-save variables */
u8 iPowerSaveMode; /* 0 indicates on, 1 indicates off */
u8 ATIMmode;
u8 ExcludeUnencrypted;
/* Unit time count for the decision to enter PS mode */
u16 CheckCountForPS;
u8 boHasTxActivity;/* tx activity has occurred */
u8 boMacPsValid; /* Power save mode obtained
* from H/W is valid or not
*/
/* Rate */
u8 TxRateMode; /*
* Initial, input from Registry,
* may be updated by GUI
* Tx Rate Mode: auto(DTO on), max, 1M, 2M, ..
*/
u8 CurrentTxRate; /* The current Tx rate */
u8 CurrentTxRateForMng; /*
* The current Tx rate for management
* frames. It will be decided before
* connection succeeds.
*/
u8 CurrentTxFallbackRate;
/* for Rate handler */
u8 BRateSet[32]; /* basic rate set */
u8 SRateSet[32]; /* support rate set */
u8 NumOfBRate;
u8 NumOfSRate;
u8 NumOfDsssRateInSRate; /* number of DSSS rates in
* supported rate set
*/
u8 reserved1;
u32 dwBasicRateBitmap; /* bit map of basic rates */
u32 dwSupportRateBitmap; /* bit map of all support rates
* including basic and operational
* rates
*/
/* For SME/MLME handler */
u16 wOldSTAindex; /* valid when boHandover=TRUE,
* store old connected STA index
*/
u16 wConnectedSTAindex; /* Index of peerly connected AP or
* IBSS in the descriptionset.
*/
u16 Association_ID; /* The Association ID in the
* (Re)Association Response frame.
*/
u16 ListenInterval; /* The listen interval when SME invoking
* MLME_ (Re)Associate_Request().
*/
struct radio_off RadioOffStatus;
u8 Reserved0[2];
u8 boMsRadioOff; /* Ndis demands to be true when set
* Disassoc. OID and be false when
* set SSID OID.
*/
u8 bAntennaNo; /* which antenna */
u8 bConnectFlag; /* the connect status flag for
* roaming task
*/
u8 RoamStatus;
u8 reserved7[3];
struct chan_info CurrentChan; /* Current channel no. and channel band.
* It may be changed by scanning.
*/
u8 boHandover; /* Roaming, Handover to other AP. */
u8 boCCAbusy;
u16 CWMax; /* It may not be the real value
* that H/W used
*/
u8 CWMin; /* 255: set according to 802.11 spec. */
u8 reserved2;
/* 11G: */
u8 bMacOperationMode; /* operation in 802.11b or 802.11g */
u8 bSlotTimeMode; /* AUTO, s32 */
u8 bPreambleMode; /* AUTO, s32 */
u8 boNonERPpresent;
u8 boProtectMechanism; /* H/W will take the necessary action
* based on this variable
*/
u8 boShortPreamble; /* Same here */
u8 boShortSlotTime; /* Same here */
u8 reserved_3;
u32 RSN_IE_Bitmap;
u32 RSN_OUI_Type;
/* For the BSSID */
u8 HwBssid[MAC_ADDR_LENGTH + 2];
u32 HwBssidValid;
/* For scan list */
u8 BssListCount; /* Total count of valid
* descriptor indexes
*/
u8 boReceiveUncorrectInfo; /* important settings in beacon/probe
* resp. have been changed
*/
u8 NoOfJoinerInIbss;
u8 reserved_4;
/* Store the valid descriptor indexes obtained from scannings */
u8 BssListIndex[(MAX_BSS_DESCRIPT_ELEMENT + 3) & ~0x03];
/*
* Save the BssDescriptor index in this IBSS.
* The index 0 is local descriptor (psLOCAL->wConnectedSTAindex).
* If CONNECTED : NoOfJoinerInIbss >= 2
* else : NoOfJoinerInIbss <= 1
*/
u8 JoinerInIbss[(MAX_BSS_DESCRIPT_ELEMENT + 3) & ~0x03];
/* General Statistics, count at Rx_handler or
* Tx_callback interrupt handler
*/
u64 GS_XMIT_OK; /* Good Frames Transmitted */
u64 GS_RCV_OK; /* Good Frames Received */
u32 GS_RCV_ERROR; /* Frames received with crc error */
u32 GS_XMIT_ERROR; /* Bad Frames Transmitted */
u32 GS_RCV_NO_BUFFER; /* Receive Buffer underrun */
u32 GS_XMIT_ONE_COLLISION; /* one collision */
u32 GS_XMIT_MORE_COLLISIONS;/* more collisions */
/*
* ================================================================
* Statistics (no matter whether it had done successfully) -wkchen
* ================================================================
*/
u32 _NumRxMSDU;
u32 _NumTxMSDU;
u32 _dot11WEPExcludedCount;
u32 _dot11WEPUndecryptableCount;
u32 _dot11FrameDuplicateCount;
struct chan_info IbssChanSetting; /* 2B. Start IBSS Channel
* setting by registry or
* WWU.
*/
u8 reserved_5[2]; /* It may not be used after
* considering RF type, region
* and modulation type.
*/
u8 reserved_6[2]; /* two variables are for wep
* key error detection
*/
u32 bWepKeyError;
u32 bToSelfPacketReceived;
u32 WepKeyDetectTimerCount;
u16 SignalLostTh;
u16 SignalRoamTh;
u8 IE_Append_data[MAX_IE_APPEND_SIZE];
u16 IE_Append_size;
u16 reserved_7;
};
#endif
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// MAC_Structures.h
//
// This file contains the definitions and data structures used by SW-MAC.
//
// Revision Histoy
//=================
// 0.1 2002 UN00
// 0.2 20021004 PD43 CCLiu6
// 20021018 PD43 CCLiu6
// Add enum_TxRate type
// Modify enum_STAState type
// 0.3 20021023 PE23 CYLiu update MAC session struct
// 20021108
// 20021122 PD43 Austin
// Deleted some unused.
// 20021129 PD43 Austin
// 20030617 increase the 802.11g definition
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
#ifndef _MAC_Structures_H_
#define _MAC_Structures_H_
#define MAC_ADDR_LENGTH 6
/* ========================================================
// 802.11 Frame define
//----- */
#define DOT_11_MAC_HEADER_SIZE 24
#define DOT_11_SNAP_SIZE 6
#define DOT_11_DURATION_OFFSET 2
/* Sequence control offset */
#define DOT_11_SEQUENCE_OFFSET 22
/* The start offset of 802.11 Frame// */
#define DOT_11_TYPE_OFFSET 30
#define DOT_11_DATA_OFFSET 24
#define DOT_11_DA_OFFSET 4
#define MAX_ETHERNET_PACKET_SIZE 1514
/* ----- management : Type of Bits (2, 3) and Subtype of Bits (4, 5, 6, 7) */
#define MAC_SUBTYPE_MNGMNT_ASSOC_REQUEST 0x00
#define MAC_SUBTYPE_MNGMNT_ASSOC_RESPONSE 0x10
#define MAC_SUBTYPE_MNGMNT_REASSOC_REQUEST 0x20
#define MAC_SUBTYPE_MNGMNT_REASSOC_RESPONSE 0x30
#define MAC_SUBTYPE_MNGMNT_PROBE_REQUEST 0x40
#define MAC_SUBTYPE_MNGMNT_PROBE_RESPONSE 0x50
#define MAC_SUBTYPE_MNGMNT_BEACON 0x80
#define MAC_SUBTYPE_MNGMNT_ATIM 0x90
#define MAC_SUBTYPE_MNGMNT_DISASSOCIATION 0xA0
#define MAC_SUBTYPE_MNGMNT_AUTHENTICATION 0xB0
#define MAC_SUBTYPE_MNGMNT_DEAUTHENTICATION 0xC0
#define RATE_AUTO 0
#define RATE_1M 2
#define RATE_2M 4
#define RATE_5dot5M 11
#define RATE_6M 12
#define RATE_9M 18
#define RATE_11M 22
#define RATE_12M 24
#define RATE_18M 36
#define RATE_22M 44
#define RATE_24M 48
#define RATE_33M 66
#define RATE_36M 72
#define RATE_48M 96
#define RATE_54M 108
#define RATE_MAX 255
#endif /* _MAC_Structure_H_ */
This diff is collapsed.
#ifndef __WINBOND_MDS_F_H
#define __WINBOND_MDS_F_H
#include "wbhal.h"
#include "core.h"
unsigned char Mds_initial(struct wbsoft_priv *adapter);
void Mds_Tx(struct wbsoft_priv *adapter);
void Mds_SendComplete(struct wbsoft_priv *adapter, struct T02_descriptor *pt02);
void Mds_MpduProcess(struct wbsoft_priv *adapter,
struct wb35_descriptor *prxdes);
/* For data frame sending */
u16 MDS_GetPacketSize(struct wbsoft_priv *adapter);
void MDS_GetNextPacket(struct wbsoft_priv *adapter,
struct wb35_descriptor *pdes);
void MDS_GetNextPacketComplete(struct wbsoft_priv *adapter,
struct wb35_descriptor *pdes);
void MDS_SendResult(struct wbsoft_priv *adapter, u8 packetid,
unsigned char sendok);
#endif
#ifndef __WINBOND_MDS_H
#define __WINBOND_MDS_H
#include <linux/timer.h>
#include <linux/types.h>
#include <linux/atomic.h>
#include "localpara.h"
#include "mac_structures.h"
/* Preamble_Type, see <SFS-802.11G-MIB-203> */
enum {
WLAN_PREAMBLE_TYPE_SHORT,
WLAN_PREAMBLE_TYPE_LONG,
};
/*****************************************************************************/
#define MAX_USB_TX_DESCRIPTOR 15 /* IS89C35 ability */
#define MAX_USB_TX_BUFFER_NUMBER 4 /* Virtual pre-buffer number of MAX_USB_TX_BUFFER */
#define MAX_USB_TX_BUFFER 4096 /* IS89C35 ability 4n alignment is required for hardware */
#define AUTH_REQUEST_PAIRWISE_ERROR 0 /* _F flag setting */
#define AUTH_REQUEST_GROUP_ERROR 1 /* _F flag setting */
#define CURRENT_FRAGMENT_THRESHOLD (adapter->Mds.TxFragmentThreshold & ~0x1)
#define CURRENT_PREAMBLE_MODE (psLOCAL->boShortPreamble ? WLAN_PREAMBLE_TYPE_SHORT : WLAN_PREAMBLE_TYPE_LONG)
#define CURRENT_TX_RATE_FOR_MNG (adapter->sLocalPara.CurrentTxRateForMng)
#define CURRENT_PROTECT_MECHANISM (psLOCAL->boProtectMechanism)
#define CURRENT_RTS_THRESHOLD (adapter->Mds.TxRTSThreshold)
#define MIB_GS_XMIT_OK_INC (adapter->sLocalPara.GS_XMIT_OK++)
#define MIB_GS_RCV_OK_INC (adapter->sLocalPara.GS_RCV_OK++)
#define MIB_GS_XMIT_ERROR_INC (adapter->sLocalPara.GS_XMIT_ERROR)
/* ---------- TX ----------------------------------- */
#define ETHERNET_TX_DESCRIPTORS MAX_USB_TX_BUFFER_NUMBER
/* ---------- RX ----------------------------------- */
#define ETHERNET_RX_DESCRIPTORS 8 /* It's not necessary to allocate more than 2 in sync indicate */
/*
* ================================================================
* Configuration default value
* ================================================================
*/
#define DEFAULT_MULTICASTLISTMAX 32 /* standard */
#define DEFAULT_TX_BURSTLENGTH 3 /* 32 Longwords */
#define DEFAULT_RX_BURSTLENGTH 3 /* 32 Longwords */
#define DEFAULT_TX_THRESHOLD 0 /* Full Packet */
#define DEFAULT_RX_THRESHOLD 0 /* Full Packet */
#define DEFAULT_MAXTXRATE 6 /* 11 Mbps (Long) */
#define DEFAULT_CHANNEL 3 /* Chennel 3 */
#define DEFAULT_RTSThreshold 2347 /* Disable RTS */
#define DEFAULT_PME 0 /* Disable */
#define DEFAULT_SIFSTIME 10
#define DEFAULT_ACKTIME_1ML 304 /* 148 + 44 + 112 */
#define DEFAULT_ACKTIME_2ML 248 /* 148 + 44 + 56 */
#define DEFAULT_FRAGMENT_THRESHOLD 2346 /* No fragment */
#define DEFAULT_PREAMBLE_LENGTH 72
#define DEFAULT_PLCPHEADERTIME_LENGTH 24
/*
* ------------------------------------------------------------------------
* 0.96 sec since time unit of the R03 for the current, W89C32 is about 60ns
* instead of 960 ns. This shall be fixed in the future W89C32
* -------------------------------------------------------------------------
*/
#define DEFAULT_MAX_RECEIVE_TIME 16440000
#define RX_BUF_SIZE 2352 /* 600 - For 301 must be multiple of 8 */
#define MAX_RX_DESCRIPTORS 18 /* Rx Layer 2 */
/* For brand-new rx system */
#define MDS_ID_IGNORE ETHERNET_RX_DESCRIPTORS
/* For Tx Packet status classify */
#define PACKET_FREE_TO_USE 0
#define PACKET_COME_FROM_NDIS 0x08
#define PACKET_COME_FROM_MLME 0x80
#define PACKET_SEND_COMPLETE 0xff
struct wb35_mds {
/* For Tx usage */
u8 TxOwner[((MAX_USB_TX_BUFFER_NUMBER + 3) & ~0x03)];
u8 *pTxBuffer;
u16 TxBufferSize[((MAX_USB_TX_BUFFER_NUMBER + 1) & ~0x01)];
u8 TxDesFrom[((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03)];/* 1: MLME 2: NDIS control 3: NDIS data */
u8 TxCountInBuffer[((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03)];
u8 TxFillIndex; /* the next index of TxBuffer can be used */
u8 TxDesIndex; /* The next index of TxDes can be used */
u8 ScanTxPause; /* data Tx pause because the scanning is progressing, but probe request Tx won't. */
u8 TxPause; /*For pause the Mds_Tx modult */
atomic_t TxThreadCount; /* For thread counting */
u16 TxResult[((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01)];/* Collect the sending result of Mpdu */
u8 MicRedundant[8]; /* For tmp use */
u8 *MicWriteAddress[2]; /* The start address to fill the Mic, use 2 point due to Mic maybe fragment */
u16 MicWriteSize[2];
u16 MicAdd; /* If want to add the Mic, this variable equal to 8 */
u16 MicWriteIndex; /* The number of MicWriteAddress */
u8 TxRate[((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01)][2]; /* [0] current tx rate, [1] fall back rate */
u8 TxInfo[((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01)]; /*Store information for callback function */
/* ---- for Tx Parameter */
u16 TxFragmentThreshold; /* For frame body only */
u16 TxRTSThreshold;
u32 MaxReceiveTime;
/* depend on OS, */
u32 MulticastListNo;
u32 PacketFilter; /* Setting by NDIS, the current packet filter in use. */
u8 MulticastAddressesArray[DEFAULT_MULTICASTLISTMAX][MAC_ADDR_LENGTH];
/* COUNTERMEASURE */
u8 bMICfailCount;
u8 boCounterMeasureBlock;
u8 reserved_4[2];
u32 TxTsc;
u32 TxTsc_2;
};
#endif
/*
* ============================================================================
* MTO.C -
*
* Description:
* MAC Throughput Optimization for W89C33 802.11g WLAN STA.
*
* The following MIB attributes or internal variables will be affected
* while the MTO is being executed:
* dot11FragmentationThreshold,
* dot11RTSThreshold,
* transmission rate and PLCP preamble type,
* CCA mode,
* antenna diversity.
*
* Copyright (c) 2003 Winbond Electronics Corp. All rights reserved.
* ============================================================================
*/
#include "sme_api.h"
#include "wbhal.h"
#include "wb35reg_f.h"
#include "core.h"
#include "mto.h"
/* Declare SQ3 to rate and fragmentation threshold table */
/* Declare fragmentation threshold table */
#define MTO_MAX_FRAG_TH_LEVELS 5
#define MTO_MAX_DATA_RATE_LEVELS 12
u16 MTO_Frag_Th_Tbl[MTO_MAX_FRAG_TH_LEVELS] = {
256, 384, 512, 768, 1536
};
/*
* Declare data rate table:
* The following table will be changed at anytime if the operation rate
* supported by AP don't match the table
*/
static u8 MTO_Data_Rate_Tbl[MTO_MAX_DATA_RATE_LEVELS] = {
2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108
};
/* this record the retry rate at different data rate */
static int retryrate_rec[MTO_MAX_DATA_RATE_LEVELS];
static u8 boSparseTxTraffic;
/*
* ===========================================================================
* MTO_Init --
*
* Description:
* Initialize MTO parameters.
*
* This function should be invoked during system initialization.
*
* Arguments:
* adapter - The pointer to the Miniport adapter Context
* ===========================================================================
*/
void MTO_Init(struct wbsoft_priv *adapter)
{
int i;
MTO_PREAMBLE_TYPE() = MTO_PREAMBLE_SHORT; /* for test */
MTO_CNT_ANT(0) = 0;
MTO_CNT_ANT(1) = 0;
MTO_SQ_ANT(0) = 0;
MTO_SQ_ANT(1) = 0;
MTO_AGING_TIMEOUT() = 0;
/* The following parameters should be initialized to the values set by user */
MTO_RATE_LEVEL() = 0;
MTO_FRAG_TH_LEVEL() = 4;
MTO_RTS_THRESHOLD() = MTO_FRAG_TH() + 1;
MTO_RTS_THRESHOLD_SETUP() = MTO_FRAG_TH() + 1;
MTO_RATE_CHANGE_ENABLE() = 1;
MTO_FRAG_CHANGE_ENABLE() = 0;
MTO_POWER_CHANGE_ENABLE() = 1;
MTO_PREAMBLE_CHANGE_ENABLE() = 1;
MTO_RTS_CHANGE_ENABLE() = 0;
for (i = 0; i < MTO_MAX_DATA_RATE_LEVELS; i++)
retryrate_rec[i] = 5;
MTO_TXFLOWCOUNT() = 0;
/* --------- DTO threshold parameters ------------- */
MTOPARA_PERIODIC_CHECK_CYCLE() = 10;
MTOPARA_RSSI_TH_FOR_ANTDIV() = 10;
MTOPARA_TXCOUNT_TH_FOR_CALC_RATE() = 50;
MTOPARA_TXRATE_INC_TH() = 10;
MTOPARA_TXRATE_DEC_TH() = 30;
MTOPARA_TXRATE_EQ_TH() = 40;
MTOPARA_TXRATE_BACKOFF() = 12;
MTOPARA_TXRETRYRATE_REDUCE() = 6;
if (MTO_TXPOWER_FROM_EEPROM == 0xff) {
switch (MTO_HAL()->phy_type) {
case RF_AIROHA_2230:
case RF_AIROHA_2230S:
MTOPARA_TXPOWER_INDEX() = 46; /* MAX-8 @@ Only for AL 2230 */
break;
case RF_AIROHA_7230:
MTOPARA_TXPOWER_INDEX() = 49;
break;
case RF_WB_242:
MTOPARA_TXPOWER_INDEX() = 10;
break;
case RF_WB_242_1:
MTOPARA_TXPOWER_INDEX() = 24;
break;
}
} else { /* follow the setting from EEPROM */
MTOPARA_TXPOWER_INDEX() = MTO_TXPOWER_FROM_EEPROM;
}
RFSynthesizer_SetPowerIndex(MTO_HAL(), (u8) MTOPARA_TXPOWER_INDEX());
/* ------------------------------------------------ */
/* For RSSI turning -- Cancel load from EEPROM */
MTO_DATA().RSSI_high = -41;
MTO_DATA().RSSI_low = -60;
}
/* ===========================================================================
* Description:
* If we enable DTO, we will ignore the tx count with different tx rate
* from DTO rate. This is because when we adjust DTO tx rate, there could
* be some packets in the tx queue with previous tx rate
*/
void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 tx_rate, u8 index)
{
MTO_TXFLOWCOUNT()++;
if ((MTO_ENABLE == 1) && (MTO_RATE_CHANGE_ENABLE() == 1)) {
if (tx_rate == MTO_DATA_RATE()) {
if (index == 0) {
if (boSparseTxTraffic)
MTO_HAL()->dto_tx_frag_count += MTOPARA_PERIODIC_CHECK_CYCLE();
else
MTO_HAL()->dto_tx_frag_count += 1;
} else {
if (index < 8) {
MTO_HAL()->dto_tx_retry_count += index;
MTO_HAL()->dto_tx_frag_count += (index + 1);
} else {
MTO_HAL()->dto_tx_retry_count += 7;
MTO_HAL()->dto_tx_frag_count += 7;
}
}
} else if (MTO_DATA_RATE() > 48 && tx_rate == 48) {
/* for reducing data rate scheme, do not calculate different data rate. 3 is the reducing data rate at retry. */
if (index < 3) {
MTO_HAL()->dto_tx_retry_count += index;
MTO_HAL()->dto_tx_frag_count += (index + 1);
} else {
MTO_HAL()->dto_tx_retry_count += 3;
MTO_HAL()->dto_tx_frag_count += 3;
}
}
} else {
MTO_HAL()->dto_tx_retry_count += index;
MTO_HAL()->dto_tx_frag_count += (index + 1);
}
}
/*
* ==================================================================
* MTO.H
*
* Copyright (c) 2003 Winbond Electronics Corp. All rights reserved.
* ==================================================================
*/
#ifndef __MTO_H__
#define __MTO_H__
#include <linux/types.h>
struct wbsoft_priv;
#define MTO_PREAMBLE_LONG WLAN_PREAMBLE_TYPE_LONG
#define MTO_PREAMBLE_SHORT WLAN_PREAMBLE_TYPE_SHORT
/* Defines the parameters used in the MAC Throughput Optimization algorithm */
struct wb35_mto_params {
u32 TxFlowCount; /* to judge what kind the tx flow(sparse or busy) is */
/* --------- DTO threshold parameters ------------- */
u16 DTO_PeriodicCheckCycle;
u16 DTO_RssiThForAntDiv;
u16 DTO_TxCountThForCalcNewRate;
u16 DTO_TxRateIncTh;
u16 DTO_TxRateDecTh;
u16 DTO_TxRateEqTh;
u16 DTO_TxRateBackOff;
u16 DTO_TxRetryRateReduce;
u16 DTO_TxPowerIndex; /* 0 ~ 31 */
u16 reserved_1;
/* ------------------------------------------------ */
u8 PowerChangeEnable;
u8 AntDiversityEnable;
u8 CCA_Mode;
u8 CCA_Mode_Setup;
u8 Preamble_Type;
u8 PreambleChangeEnable;
u8 DataRateLevel;
u8 DataRateChangeEnable;
u8 FragThresholdLevel;
u8 FragThresholdChangeEnable;
u16 RTSThreshold;
u16 RTSThreshold_Setup;
u32 AvgIdleSlot;
u32 Pr_Interf;
u32 AvgGapBtwnInterf;
u8 RTSChangeEnable;
u8 Ant_sel;
u8 aging_timeout;
u8 reserved_2;
u32 Cnt_Ant[2];
u32 SQ_Ant[2];
u8 FallbackRateLevel;
u8 OfdmRateLevel;
u8 RatePolicy;
u8 reserved_3[3];
/* For RSSI turning */
s32 RSSI_high;
s32 RSSI_low;
};
#define MTO_DATA() (adapter->sMtoPara)
#define MTO_HAL() (&adapter->sHwData)
#define MTO_SET_PREAMBLE_TYPE(x) /* Turbo mark LM_PREAMBLE_TYPE(&pcore_data->lm_data) = (x) */
#define MTO_ENABLE (adapter->sLocalPara.TxRateMode == RATE_AUTO)
#define MTO_TXPOWER_FROM_EEPROM (adapter->sHwData.PowerIndexFromEEPROM)
#define LOCAL_ANTENNA_NO() (adapter->sLocalPara.bAntennaNo)
#define LOCAL_IS_CONNECTED() (adapter->sLocalPara.wConnectedSTAindex != 0)
#define MTO_INITTXRATE_MODE (adapter->sHwData.SoftwareSet&0x2) /* bit 1 */
#define MTO_POWER_CHANGE_ENABLE() MTO_DATA().PowerChangeEnable
#define MTO_CCA_MODE() MTO_DATA().CCA_Mode
#define MTO_CCA_MODE_SETUP() MTO_DATA().CCA_Mode_Setup
#define MTO_PREAMBLE_TYPE() MTO_DATA().Preamble_Type
#define MTO_PREAMBLE_CHANGE_ENABLE() MTO_DATA().PreambleChangeEnable
#define MTO_RATE_LEVEL() MTO_DATA().DataRateLevel
#define MTO_OFDM_RATE_LEVEL() MTO_DATA().OfdmRateLevel
#define MTO_RATE_CHANGE_ENABLE() MTO_DATA().DataRateChangeEnable
#define MTO_FRAG_TH_LEVEL() MTO_DATA().FragThresholdLevel
#define MTO_FRAG_CHANGE_ENABLE() MTO_DATA().FragThresholdChangeEnable
#define MTO_RTS_THRESHOLD() MTO_DATA().RTSThreshold
#define MTO_RTS_CHANGE_ENABLE() MTO_DATA().RTSChangeEnable
#define MTO_RTS_THRESHOLD_SETUP() MTO_DATA().RTSThreshold_Setup
#define MTO_AVG_IDLE_SLOT() MTO_DATA().AvgIdleSlot
#define MTO_PR_INTERF() MTO_DATA().Pr_Interf
#define MTO_AVG_GAP_BTWN_INTERF() MTO_DATA().AvgGapBtwnInterf
#define MTO_CNT_ANT(x) MTO_DATA().Cnt_Ant[(x)]
#define MTO_SQ_ANT(x) MTO_DATA().SQ_Ant[(x)]
#define MTO_AGING_TIMEOUT() MTO_DATA().aging_timeout
#define MTO_TXFLOWCOUNT() MTO_DATA().TxFlowCount
/* --------- DTO threshold parameters ------------- */
#define MTOPARA_PERIODIC_CHECK_CYCLE() MTO_DATA().DTO_PeriodicCheckCycle
#define MTOPARA_RSSI_TH_FOR_ANTDIV() MTO_DATA().DTO_RssiThForAntDiv
#define MTOPARA_TXCOUNT_TH_FOR_CALC_RATE() MTO_DATA().DTO_TxCountThForCalcNewRate
#define MTOPARA_TXRATE_INC_TH() MTO_DATA().DTO_TxRateIncTh
#define MTOPARA_TXRATE_DEC_TH() MTO_DATA().DTO_TxRateDecTh
#define MTOPARA_TXRATE_EQ_TH() MTO_DATA().DTO_TxRateEqTh
#define MTOPARA_TXRATE_BACKOFF() MTO_DATA().DTO_TxRateBackOff
#define MTOPARA_TXRETRYRATE_REDUCE() MTO_DATA().DTO_TxRetryRateReduce
#define MTOPARA_TXPOWER_INDEX() MTO_DATA().DTO_TxPowerIndex
/* ------------------------------------------------ */
extern u16 MTO_Frag_Th_Tbl[];
#define MTO_DATA_RATE() MTO_Data_Rate_Tbl[MTO_RATE_LEVEL()]
#define MTO_FRAG_TH() MTO_Frag_Th_Tbl[MTO_FRAG_TH_LEVEL()]
void MTO_Init(struct wbsoft_priv *);
void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 t0, u8 index);
#endif /* __MTO_H__ */
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#ifndef __WINBOND_PHY_CALIBRATION_H
#define __WINBOND_PHY_CALIBRATION_H
#include "wbhal.h"
#define REG_AGC_CTRL1 0x1000
#define REG_AGC_CTRL2 0x1004
#define REG_AGC_CTRL3 0x1008
#define REG_AGC_CTRL4 0x100C
#define REG_AGC_CTRL5 0x1010
#define REG_AGC_CTRL6 0x1014
#define REG_AGC_CTRL7 0x1018
#define REG_AGC_CTRL8 0x101C
#define REG_AGC_CTRL9 0x1020
#define REG_AGC_CTRL10 0x1024
#define REG_CCA_CTRL 0x1028
#define REG_A_ACQ_CTRL 0x102C
#define REG_B_ACQ_CTRL 0x1030
#define REG_A_TXRX_CTRL 0x1034
#define REG_B_TXRX_CTRL 0x1038
#define REG_A_TX_COEF3 0x103C
#define REG_A_TX_COEF2 0x1040
#define REG_A_TX_COEF1 0x1044
#define REG_B_TX_COEF2 0x1048
#define REG_B_TX_COEF1 0x104C
#define REG_MODE_CTRL 0x1050
#define REG_CALIB_DATA 0x1054
#define REG_IQ_ALPHA 0x1058
#define REG_DC_CANCEL 0x105C
#define REG_WTO_READ 0x1060
#define REG_OFFSET_READ 0x1064
#define REG_CALIB_READ1 0x1068
#define REG_CALIB_READ2 0x106C
#define REG_A_FREQ_EST 0x1070
#define MASK_AMER_OFF_REG BIT(31)
#define MASK_BMER_OFF_REG BIT(31)
#define MASK_LNA_FIX_GAIN (BIT(3) | BIT(4))
#define MASK_AGC_FIX BIT(1)
#define MASK_AGC_FIX_GAIN 0xFF00
#define MASK_ADC_DC_CAL_STR BIT(10)
#define MASK_CALIB_START BIT(4)
#define MASK_IQCAL_TONE_SEL (BIT(3) | BIT(2))
#define MASK_IQCAL_MODE (BIT(1) | BIT(0))
#define MASK_TX_CAL_0 0xF0000000
#define TX_CAL_0_SHIFT 28
#define MASK_TX_CAL_1 0x0F000000
#define TX_CAL_1_SHIFT 24
#define MASK_TX_CAL_2 0x00F00000
#define TX_CAL_2_SHIFT 20
#define MASK_TX_CAL_3 0x000F0000
#define TX_CAL_3_SHIFT 16
#define MASK_RX_CAL_0 0x0000F000
#define RX_CAL_0_SHIFT 12
#define MASK_RX_CAL_1 0x00000F00
#define RX_CAL_1_SHIFT 8
#define MASK_RX_CAL_2 0x000000F0
#define RX_CAL_2_SHIFT 4
#define MASK_RX_CAL_3 0x0000000F
#define RX_CAL_3_SHIFT 0
#define MASK_CANCEL_DC_I 0x3E0
#define CANCEL_DC_I_SHIFT 5
#define MASK_CANCEL_DC_Q 0x01F
#define CANCEL_DC_Q_SHIFT 0
#define MASK_ADC_DC_CAL_I(x) (((x) & 0x0003FE00) >> 9)
#define MASK_ADC_DC_CAL_Q(x) ((x) & 0x000001FF)
#define MASK_IQCAL_TONE_I 0x00001FFF
#define SHIFT_IQCAL_TONE_I(x) ((x) >> 0)
#define MASK_IQCAL_TONE_Q 0x03FFE000
#define SHIFT_IQCAL_TONE_Q(x) ((x) >> 13)
void phy_set_rf_data(struct hw_data *pHwData, u32 index, u32 value);
void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
#define phy_init_rf(_A) /* RFSynthesizer_initial(_A) */
#endif
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/*
* sme_api.h
*
* Copyright(C) 2002 Winbond Electronics Corp.
*/
#ifndef __SME_API_H__
#define __SME_API_H__
#include <linux/types.h>
#include "localpara.h"
/****************** CONSTANT AND MACRO SECTION ******************************/
#define MEDIA_STATE_DISCONNECTED 0
#define MEDIA_STATE_CONNECTED 1
/* ARRAY CHECK */
#define MAX_POWER_TO_DB 32
/****************** TYPE DEFINITION SECTION *********************************/
/****************** EXPORTED FUNCTION DECLARATION SECTION *******************/
/* OID_802_11_BSSID */
s8 sme_get_bssid(void *pcore_data, u8 *pbssid);
s8 sme_get_desired_bssid(void *pcore_data, u8 *pbssid); /* Unused */
s8 sme_set_desired_bssid(void *pcore_data, u8 *pbssid);
/* OID_802_11_SSID */
s8 sme_get_ssid(void *pcore_data, u8 *pssid, u8 *pssid_len);
s8 sme_get_desired_ssid(void *pcore_data, u8 *pssid, u8 *pssid_len);/* Unused */
s8 sme_set_desired_ssid(void *pcore_data, u8 *pssid, u8 ssid_len);
/* OID_802_11_INFRASTRUCTURE_MODE */
s8 sme_get_bss_type(void *pcore_data, u8 *pbss_type);
s8 sme_get_desired_bss_type(void *pcore_data, u8 *pbss_type); /* Unused */
s8 sme_set_desired_bss_type(void *pcore_data, u8 bss_type);
/* OID_802_11_FRAGMENTATION_THRESHOLD */
s8 sme_get_fragment_threshold(void *pcore_data, u32 *pthreshold);
s8 sme_set_fragment_threshold(void *pcore_data, u32 threshold);
/* OID_802_11_RTS_THRESHOLD */
s8 sme_get_rts_threshold(void *pcore_data, u32 *pthreshold);
s8 sme_set_rts_threshold(void *pcore_data, u32 threshold);
/* OID_802_11_CONFIGURATION */
s8 sme_get_beacon_period(void *pcore_data, u16 *pbeacon_period);
s8 sme_set_beacon_period(void *pcore_data, u16 beacon_period);
s8 sme_get_atim_window(void *pcore_data, u16 *patim_window);
s8 sme_set_atim_window(void *pcore_data, u16 atim_window);
s8 sme_get_current_channel(void *pcore_data, u8 *pcurrent_channel);
s8 sme_get_current_band(void *pcore_data, u8 *pcurrent_band);
s8 sme_set_current_channel(void *pcore_data, u8 current_channel);
/* OID_802_11_BSSID_LIST */
s8 sme_get_scan_bss_count(void *pcore_data, u8 *pcount);
s8 sme_get_scan_bss(void *pcore_data, u8 index, void **ppbss);
s8 sme_get_connected_bss(void *pcore_data, void **ppbss_now);
/* OID_802_11_AUTHENTICATION_MODE */
s8 sme_get_auth_mode(void *pcore_data, u8 *pauth_mode);
s8 sme_set_auth_mode(void *pcore_data, u8 auth_mode);
/* OID_802_11_WEP_STATUS / OID_802_11_ENCRYPTION_STATUS */
s8 sme_get_wep_mode(void *pcore_data, u8 *pwep_mode);
s8 sme_set_wep_mode(void *pcore_data, u8 wep_mode);
/* OID_GEN_VENDOR_ID */
/* OID_802_3_PERMANENT_ADDRESS */
s8 sme_get_permanent_mac_addr(void *pcore_data, u8 *pmac_addr);
/* OID_802_3_CURRENT_ADDRESS */
s8 sme_get_current_mac_addr(void *pcore_data, u8 *pmac_addr);
/* OID_802_11_NETWORK_TYPE_IN_USE */
s8 sme_get_network_type_in_use(void *pcore_data, u8 *ptype);
s8 sme_set_network_type_in_use(void *pcore_data, u8 type);
/* OID_802_11_SUPPORTED_RATES */
s8 sme_get_supported_rate(void *pcore_data, u8 *prates);
/* OID_802_11_ADD_WEP */
s8 sme_set_add_wep(void *pcore_data, u32 key_index, u32 key_len,
u8 *Address, u8 *key);
/* OID_802_11_REMOVE_WEP */
s8 sme_set_remove_wep(void *pcre_data, u32 key_index);
/* OID_802_11_DISASSOCIATE */
s8 sme_set_disassociate(void *pcore_data);
/* OID_802_11_POWER_MODE */
s8 sme_get_power_mode(void *pcore_data, u8 *pmode);
s8 sme_set_power_mode(void *pcore_data, u8 mode);
/* OID_802_11_BSSID_LIST_SCAN */
s8 sme_set_bssid_list_scan(void *pcore_data, void *pscan_para);
/* OID_802_11_RELOAD_DEFAULTS */
s8 sme_set_reload_defaults(void *pcore_data, u8 reload_type);
/*------------------------- non-standard ----------------------------------*/
s8 sme_get_connect_status(void *pcore_data, u8 *pstatus);
/*--------------------------------------------------------------------------*/
void sme_get_encryption_status(void *pcore_data, u8 *EncryptStatus);
void sme_set_encryption_status(void *pcore_data, u8 EncryptStatus);
s8 sme_add_key(void *pcore_data,
u32 key_index,
u8 key_len,
u8 key_type,
u8 *key_bssid,
u8 *ptx_tsc,
u8 *prx_tsc,
u8 *key_material);
void sme_remove_default_key(void *pcore_data, int index);
void sme_remove_mapping_key(void *pcore_data, u8 *pmac_addr);
void sme_clear_all_mapping_key(void *pcore_data);
void sme_clear_all_default_key(void *pcore_data);
s8 sme_set_preamble_mode(void *pcore_data, u8 mode);
s8 sme_get_preamble_mode(void *pcore_data, u8 *mode);
s8 sme_get_preamble_type(void *pcore_data, u8 *type);
s8 sme_set_slottime_mode(void *pcore_data, u8 mode);
s8 sme_get_slottime_mode(void *pcore_data, u8 *mode);
s8 sme_get_slottime_type(void *pcore_data, u8 *type);
s8 sme_set_txrate_policy(void *pcore_data, u8 policy);
s8 sme_get_txrate_policy(void *pcore_data, u8 *policy);
s8 sme_get_cwmin_value(void *pcore_data, u8 *cwmin);
s8 sme_get_cwmax_value(void *pcore_data, u16 *cwmax);
s8 sme_get_ms_radio_mode(void *pcore_data, u8 *pMsRadioOff);
s8 sme_set_ms_radio_mode(void *pcore_data, u8 boMsRadioOff);
void sme_get_tx_power_level(void *pcore_data, u32 *TxPower);
u8 sme_set_tx_power_level(void *pcore_data, u32 TxPower);
void sme_get_antenna_count(void *pcore_data, u32 *AntennaCount);
void sme_get_rx_antenna(void *pcore_data, u32 *RxAntenna);
u8 sme_set_rx_antenna(void *pcore_data, u32 RxAntenna);
void sme_get_tx_antenna(void *pcore_data, u32 *TxAntenna);
s8 sme_set_tx_antenna(void *pcore_data, u32 TxAntenna);
s8 sme_set_IBSS_chan(void *pcore_data, struct chan_info chan);
s8 sme_set_IE_append(void *pcore_data, u8 *buffer, u16 buf_len);
/* ================== Local functions ====================== */
static const u32 PowerDbToMw[] = {
56, /* mW, MAX - 0, 17.5 dbm */
40, /* mW, MAX - 1, 16.0 dbm */
30, /* mW, MAX - 2, 14.8 dbm */
20, /* mW, MAX - 3, 13.0 dbm */
15, /* mW, MAX - 4, 11.8 dbm */
12, /* mW, MAX - 5, 10.6 dbm */
9, /* mW, MAX - 6, 9.4 dbm */
7, /* mW, MAX - 7, 8.3 dbm */
5, /* mW, MAX - 8, 6.4 dbm */
4, /* mW, MAX - 9, 5.3 dbm */
3, /* mW, MAX - 10, 4.0 dbm */
2, /* mW, MAX - 11, ? dbm */
2, /* mW, MAX - 12, ? dbm */
2, /* mW, MAX - 13, ? dbm */
2, /* mW, MAX - 14, ? dbm */
2, /* mW, MAX - 15, ? dbm */
2, /* mW, MAX - 16, ? dbm */
2, /* mW, MAX - 17, ? dbm */
2, /* mW, MAX - 18, ? dbm */
1, /* mW, MAX - 19, ? dbm */
1, /* mW, MAX - 20, ? dbm */
1, /* mW, MAX - 21, ? dbm */
1, /* mW, MAX - 22, ? dbm */
1, /* mW, MAX - 23, ? dbm */
1, /* mW, MAX - 24, ? dbm */
1, /* mW, MAX - 25, ? dbm */
1, /* mW, MAX - 26, ? dbm */
1, /* mW, MAX - 27, ? dbm */
1, /* mW, MAX - 28, ? dbm */
1, /* mW, MAX - 29, ? dbm */
1, /* mW, MAX - 30, ? dbm */
1 /* mW, MAX - 31, ? dbm */
};
#endif /* __SME_API_H__ */
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#ifndef __WINBOND_WB35REG_F_H
#define __WINBOND_WB35REG_F_H
#include "wbhal.h"
/*
* ====================================
* Interface function declare
* ====================================
*/
unsigned char Wb35Reg_initial(struct hw_data *hw_data);
void Uxx_power_on_procedure(struct hw_data *hw_data);
void Uxx_power_off_procedure(struct hw_data *hw_data);
void Uxx_ReadEthernetAddress(struct hw_data *hw_data);
void Dxx_initial(struct hw_data *hw_data);
void Mxx_initial(struct hw_data *hw_data);
void RFSynthesizer_initial(struct hw_data *hw_data);
void RFSynthesizer_SwitchingChannel(struct hw_data *hw_data, struct chan_info channel);
void BBProcessor_initial(struct hw_data *hw_data);
void BBProcessor_RateChanging(struct hw_data *hw_data, u8 rate);
u8 RFSynthesizer_SetPowerIndex(struct hw_data *hw_data, u8 power_index);
u8 RFSynthesizer_SetMaxim2828_24Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetMaxim2828_50Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetMaxim2827_24Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetMaxim2827_50Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetMaxim2825Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetAiroha2230Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetAiroha7230Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetWinbond242Power(struct hw_data *, u8 index);
void GetTxVgaFromEEPROM(struct hw_data *hw_data);
void EEPROMTxVgaAdjust(struct hw_data *hw_data);
#define RFWriteControlData(_A, _V) Wb35Reg_Write(_A, 0x0864, _V)
void Wb35Reg_destroy(struct hw_data *hw_data);
unsigned char Wb35Reg_Read(struct hw_data *hw_data, u16 register_no, u32 *register_value);
unsigned char Wb35Reg_ReadSync(struct hw_data *hw_data, u16 register_no, u32 *register_value);
unsigned char Wb35Reg_Write(struct hw_data *hw_data, u16 register_no, u32 register_value);
unsigned char Wb35Reg_WriteSync(struct hw_data *hw_data, u16 register_no, u32 register_value);
unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *hw_data,
u16 register_no,
u32 register_value,
s8 *value,
s8 len);
unsigned char Wb35Reg_BurstWrite(struct hw_data *hw_data,
u16 register_no,
u32 *register_data,
u8 number_of_data,
u8 flag);
void Wb35Reg_EP0VM(struct hw_data *hw_data);
void Wb35Reg_EP0VM_start(struct hw_data *hw_data);
void Wb35Reg_EP0VM_complete(struct urb *urb);
u32 BitReverse(u32 data, u32 data_length);
void CardGetMulticastBit(u8 address[MAC_ADDR_LENGTH], u8 *byte, u8 *value);
u32 CardComputeCrc(u8 *buffer, u32 length);
void Wb35Reg_phy_calibration(struct hw_data *hw_data);
void Wb35Reg_Update(struct hw_data *hw_data, u16 register_no, u32 register_value);
unsigned char adjust_TXVGA_for_iq_mag(struct hw_data *hw_data);
#endif
#ifndef __WINBOND_WB35REG_S_H
#define __WINBOND_WB35REG_S_H
#include <linux/spinlock.h>
#include <linux/types.h>
#include <linux/atomic.h>
struct hw_data;
/* =========================================================================
*
* HAL setting function
*
* ========================================
* |Uxx| |Dxx| |Mxx| |BB| |RF|
* ========================================
* | |
* Wb35Reg_Read Wb35Reg_Write
*
* ----------------------------------------
* WbUsb_CallUSBDASync supplied By WbUsb module
* ==========================================================================
*/
#define GetBit(dwData, i) (dwData & (0x00000001 << i))
#define SetBit(dwData, i) (dwData | (0x00000001 << i))
#define ClearBit(dwData, i) (dwData & ~(0x00000001 << i))
#define IGNORE_INCREMENT 0
#define AUTO_INCREMENT 0
#define NO_INCREMENT 1
#define REG_DIRECTION(_x, _y) ((_y)->DIRECT == 0 ? usb_rcvctrlpipe(_x, 0) : usb_sndctrlpipe(_x, 0))
#define REG_BUF_SIZE(_x) ((_x)->bRequest == 0x04 ? cpu_to_le16((_x)->wLength) : 4)
#define BB48_DEFAULT_AL2230_11B 0x0033447c
#define BB4C_DEFAULT_AL2230_11B 0x0A00FEFF
#define BB48_DEFAULT_AL2230_11G 0x00332C1B
#define BB4C_DEFAULT_AL2230_11G 0x0A00FEFF
#define BB48_DEFAULT_WB242_11B 0x00292315 /* backoff 2dB */
#define BB4C_DEFAULT_WB242_11B 0x0800FEFF /* backoff 2dB */
#define BB48_DEFAULT_WB242_11G 0x00453B24
#define BB4C_DEFAULT_WB242_11G 0x0E00FEFF
/*
* ====================================
* Default setting for Mxx
* ====================================
*/
#define DEFAULT_CWMIN 31 /* (M2C) CWmin. Its value is in the range 0-31. */
#define DEFAULT_CWMAX 1023 /* (M2C) CWmax. Its value is in the range 0-1023. */
#define DEFAULT_AID 1 /* (M34) AID. Its value is in the range 1-2007. */
#define DEFAULT_RATE_RETRY_LIMIT 2 /* (M38) as named */
#define DEFAULT_LONG_RETRY_LIMIT 7 /* (M38) LongRetryLimit. Its value is in the range 0-15. */
#define DEFAULT_SHORT_RETRY_LIMIT 7 /* (M38) ShortRetryLimit. Its value is in the range 0-15. */
#define DEFAULT_PIFST 25 /* (M3C) PIFS Time. Its value is in the range 0-65535. */
#define DEFAULT_EIFST 354 /* (M3C) EIFS Time. Its value is in the range 0-1048575. */
#define DEFAULT_DIFST 45 /* (M3C) DIFS Time. Its value is in the range 0-65535. */
#define DEFAULT_SIFST 5 /* (M3C) SIFS Time. Its value is in the range 0-65535. */
#define DEFAULT_OSIFST 10 /* (M3C) Original SIFS Time. Its value is in the range 0-15. */
#define DEFAULT_ATIMWD 0 /* (M40) ATIM Window. Its value is in the range 0-65535. */
#define DEFAULT_SLOT_TIME 20 /* (M40) ($) SlotTime. Its value is in the range 0-255. */
#define DEFAULT_MAX_TX_MSDU_LIFE_TIME 512 /* (M44) MaxTxMSDULifeTime. Its value is in the range 0-4294967295. */
#define DEFAULT_BEACON_INTERVAL 500 /* (M48) Beacon Interval. Its value is in the range 0-65535. */
#define DEFAULT_PROBE_DELAY_TIME 200 /* (M48) Probe Delay Time. Its value is in the range 0-65535. */
#define DEFAULT_PROTOCOL_VERSION 0 /* (M4C) */
#define DEFAULT_MAC_POWER_STATE 2 /* (M4C) 2: MAC at power active */
#define DEFAULT_DTIM_ALERT_TIME 0
struct wb35_reg_queue {
struct urb *urb;
void *pUsbReq;
void *Next;
union {
u32 VALUE;
u32 *pBuffer;
};
u8 RESERVED[4]; /* space reserved for communication */
u16 INDEX; /* For storing the register index */
u8 RESERVED_VALID; /* Indicate whether the RESERVED space is valid at this command. */
u8 DIRECT; /* 0:In 1:Out */
};
/*
* ====================================
* Internal variable for module
* ====================================
*/
#define MAX_SQ3_FILTER_SIZE 5
struct wb35_reg {
/*
* ============================
* Register Bank backup
* ============================
*/
u32 U1B0; /* bit16 record the h/w radio on/off status */
u32 U1BC_LEDConfigure;
u32 D00_DmaControl;
u32 M00_MacControl;
union {
struct {
u32 M04_MulticastAddress1;
u32 M08_MulticastAddress2;
};
u8 Multicast[8]; /* contents of card multicast registers */
};
u32 M24_MacControl;
u32 M28_MacControl;
u32 M2C_MacControl;
u32 M38_MacControl;
u32 M3C_MacControl;
u32 M40_MacControl;
u32 M44_MacControl;
u32 M48_MacControl;
u32 M4C_MacStatus;
u32 M60_MacControl;
u32 M68_MacControl;
u32 M70_MacControl;
u32 M74_MacControl;
u32 M78_ERPInformation;
u32 M7C_MacControl;
u32 M80_MacControl;
u32 M84_MacControl;
u32 M88_MacControl;
u32 M98_MacControl;
/* Baseband register */
u32 BB0C; /* Used for LNA calculation */
u32 BB2C;
u32 BB30; /* 11b acquisition control register */
u32 BB3C;
u32 BB48;
u32 BB4C;
u32 BB50; /* mode control register */
u32 BB54;
u32 BB58; /* IQ_ALPHA */
u32 BB5C; /* For test */
u32 BB60; /* for WTO read value */
/* VM */
spinlock_t EP0VM_spin_lock; /* 4B */
u32 EP0VM_status; /* $$ */
struct wb35_reg_queue *reg_first;
struct wb35_reg_queue *reg_last;
atomic_t RegFireCount;
/* Hardware status */
u8 EP0vm_state;
u8 mac_power_save;
u8 EEPROMPhyType; /*
* 0 ~ 15 for Maxim (0 ĄV MAX2825, 1 ĄV MAX2827, 2 ĄV MAX2828, 3 ĄV MAX2829),
* 16 ~ 31 for Airoha (16 ĄV AL2230, 11 - AL7230)
* 32 ~ Reserved
* 33 ~ 47 For WB242 ( 33 - WB242, 34 - WB242 with new Txvga 0.5 db step)
* 48 ~ 255 ARE RESERVED.
*/
u8 EEPROMRegion; /* Region setting in EEPROM */
u32 SyncIoPause; /* If user use the Sync Io to access Hw, then pause the async access */
u8 LNAValue[4]; /* Table for speed up running */
u32 SQ3_filter[MAX_SQ3_FILTER_SIZE];
u32 SQ3_index;
};
/* =====================================================================
* Function declaration
* =====================================================================
*/
void hal_remove_mapping_key(struct hw_data *hw_data, u8 *mac_addr);
void hal_remove_default_key(struct hw_data *hw_data, u32 index);
unsigned char hal_set_mapping_key(struct hw_data *adapter, u8 *mac_addr,
u8 null_key, u8 wep_on, u8 *tx_tsc,
u8 *rx_tsc, u8 key_type, u8 key_len,
u8 *key_data);
unsigned char hal_set_default_key(struct hw_data *adapter, u8 index,
u8 null_key, u8 wep_on, u8 *tx_tsc,
u8 *rx_tsc, u8 key_type, u8 key_len,
u8 *key_data);
void hal_clear_all_default_key(struct hw_data *hw_data);
void hal_clear_all_group_key(struct hw_data *hw_data);
void hal_clear_all_mapping_key(struct hw_data *hw_data);
void hal_clear_all_key(struct hw_data *hw_data);
void hal_set_power_save_mode(struct hw_data *hw_data, unsigned char power_save,
unsigned char wakeup, unsigned char dtim);
void hal_get_power_save_mode(struct hw_data *hw_data, u8 *in_pwr_save);
void hal_set_slot_time(struct hw_data *hw_data, u8 type);
#define hal_set_atim_window(_A, _ATM)
void hal_start_bss(struct hw_data *hw_data, u8 mac_op_mode);
/* 0:BSS STA 1:IBSS STA */
void hal_join_request(struct hw_data *hw_data, u8 bss_type);
void hal_stop_sync_bss(struct hw_data *hw_data);
void hal_resume_sync_bss(struct hw_data *hw_data);
void hal_set_aid(struct hw_data *hw_data, u16 aid);
void hal_set_bssid(struct hw_data *hw_data, u8 *bssid);
void hal_get_bssid(struct hw_data *hw_data, u8 *bssid);
void hal_set_listen_interval(struct hw_data *hw_data, u16 listen_interval);
void hal_set_cap_info(struct hw_data *hw_data, u16 capability_info);
void hal_set_ssid(struct hw_data *hw_data, u8 *ssid, u8 ssid_len);
void hal_start_tx0(struct hw_data *hw_data);
#define hal_get_cwmin(_A) ((_A)->cwmin)
void hal_set_cwmax(struct hw_data *hw_data, u16 cwin_max);
#define hal_get_cwmax(_A) ((_A)->cwmax)
void hal_set_rsn_wpa(struct hw_data *hw_data, u32 *rsn_ie_bitmap,
u32 *rsn_oui_type , unsigned char desired_auth_mode);
void hal_set_connect_info(struct hw_data *hw_data, unsigned char bo_connect);
u8 hal_get_est_sq3(struct hw_data *hw_data, u8 count);
void hal_descriptor_indicate(struct hw_data *hw_data,
struct wb35_descriptor *des);
u8 hal_get_antenna_number(struct hw_data *hw_data);
u32 hal_get_bss_pk_cnt(struct hw_data *hw_data);
#define hal_get_region_from_EEPROM(_A) ((_A)->reg.EEPROMRegion)
#define hal_get_tx_buffer(_A, _B) Wb35Tx_get_tx_buffer(_A, _B)
#define hal_software_set(_A) (_A->SoftwareSet)
#define hal_driver_init_OK(_A) (_A->IsInitOK)
#define hal_rssi_boundary_high(_A) (_A->RSSI_high)
#define hal_rssi_boundary_low(_A) (_A->RSSI_low)
#define hal_scan_interval(_A) (_A->Scan_Interval)
#define PHY_DEBUG(msg, args...)
/* return 100ms count */
#define hal_get_time_count(_P) (_P->time_count / 10)
#define hal_ibss_disconnect(_A) (hal_stop_sync_bss(_A))
#endif
/*
* ============================================================================
* Copyright (c) 1996-2002 Winbond Electronic Corporation
*
* Module Name:
* Wb35Rx.c
*
* Abstract:
* Processing the Rx message from down layer
*
* ============================================================================
*/
#include <linux/usb.h>
#include <linux/slab.h>
#include "core.h"
#include "wb35rx_f.h"
static void packet_came(struct ieee80211_hw *hw, char *pRxBufferAddress,
int PacketSize)
{
struct wbsoft_priv *priv = hw->priv;
struct sk_buff *skb;
struct ieee80211_rx_status rx_status = {0};
if (!priv->enabled)
return;
skb = dev_alloc_skb(PacketSize);
if (!skb) {
printk("Not enough memory for packet, FIXME\n");
return;
}
memcpy(skb_put(skb, PacketSize), pRxBufferAddress, PacketSize);
memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
ieee80211_rx_irqsafe(hw, skb);
}
static void Wb35Rx_adjust(struct wb35_descriptor *pRxDes)
{
u32 *pRxBufferAddress;
u32 DecryptionMethod;
u32 i;
u16 BufferSize;
DecryptionMethod = pRxDes->R01.R01_decryption_method;
pRxBufferAddress = pRxDes->buffer_address[0];
BufferSize = pRxDes->buffer_size[0];
/* Adjust the last part of data. Only data left */
BufferSize -= 4; /* For CRC-32 */
if (DecryptionMethod)
BufferSize -= 4;
if (DecryptionMethod == 3) /* For CCMP */
BufferSize -= 4;
/* Adjust the IV field which after 802.11 header and ICV field. */
if (DecryptionMethod == 1) { /* For WEP */
for (i = 6; i > 0; i--)
pRxBufferAddress[i] = pRxBufferAddress[i - 1];
pRxDes->buffer_address[0] = pRxBufferAddress + 1;
BufferSize -= 4; /* 4 byte for IV */
} else if (DecryptionMethod) { /* For TKIP and CCMP */
for (i = 7; i > 1; i--)
pRxBufferAddress[i] = pRxBufferAddress[i - 2];
/* Update the descriptor, shift 8 byte */
pRxDes->buffer_address[0] = pRxBufferAddress + 2;
BufferSize -= 8; /* 8 byte for IV + ICV */
}
pRxDes->buffer_size[0] = BufferSize;
}
static u16 Wb35Rx_indicate(struct ieee80211_hw *hw)
{
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
struct wb35_descriptor RxDes;
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
u8 *pRxBufferAddress;
u16 PacketSize;
u16 stmp, BufferSize, stmp2 = 0;
u32 RxBufferId;
/* Only one thread be allowed to run into the following */
do {
RxBufferId = pWb35Rx->RxProcessIndex;
if (pWb35Rx->RxOwner[RxBufferId]) /* Owner by VM */
break;
pWb35Rx->RxProcessIndex++;
pWb35Rx->RxProcessIndex %= MAX_USB_RX_BUFFER_NUMBER;
pRxBufferAddress = pWb35Rx->pDRx;
BufferSize = pWb35Rx->RxBufferSize[RxBufferId];
/* Parse the bulkin buffer */
while (BufferSize >= 4) {
/* Is ending? */
if ((cpu_to_le32(*(u32 *)pRxBufferAddress) & 0x0fffffff) ==
RX_END_TAG)
break;
/* Get the R00 R01 first */
RxDes.R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress);
PacketSize = (u16)RxDes.R00.R00_receive_byte_count;
RxDes.R01.value = le32_to_cpu(*((u32 *)(pRxBufferAddress + 4)));
/* For new DMA 4k */
if ((PacketSize & 0x03) > 0)
PacketSize -= 4;
/* Basic check for Rx length. Is length valid? */
if (PacketSize > MAX_PACKET_SIZE) {
pr_debug("Serious ERROR : Rx data size too long, size =%d\n",
PacketSize);
pWb35Rx->EP3vm_state = VM_STOP;
pWb35Rx->Ep3ErrorCount2++;
break;
}
/*
* Wb35Rx_indicate() is called synchronously so it isn't
* necessary to set "RxDes.Desctriptor_ID = RxBufferID;"
*/
/* subtract 8 byte for 35's USB header length */
BufferSize -= 8;
pRxBufferAddress += 8;
RxDes.buffer_address[0] = pRxBufferAddress;
RxDes.buffer_size[0] = PacketSize;
RxDes.buffer_number = 1;
RxDes.buffer_start_index = 0;
RxDes.buffer_total_size = RxDes.buffer_size[0];
Wb35Rx_adjust(&RxDes);
packet_came(hw, pRxBufferAddress, PacketSize);
/* Move RxBuffer point to the next */
stmp = PacketSize + 3;
stmp &= ~0x03; /* 4n alignment */
pRxBufferAddress += stmp;
BufferSize -= stmp;
stmp2 += stmp;
}
/* Reclaim resource */
pWb35Rx->RxOwner[RxBufferId] = 1;
} while (true);
return stmp2;
}
static void Wb35Rx(struct ieee80211_hw *hw);
static void Wb35Rx_Complete(struct urb *urb)
{
struct ieee80211_hw *hw = urb->context;
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
u8 *pRxBufferAddress;
u32 SizeCheck;
u16 BulkLength;
u32 RxBufferId;
struct R00_descriptor R00;
/* Variable setting */
pWb35Rx->EP3vm_state = VM_COMPLETED;
pWb35Rx->EP3VM_status = urb->status; /* Store the last result of Irp */
RxBufferId = pWb35Rx->CurrentRxBufferId;
pRxBufferAddress = pWb35Rx->pDRx;
BulkLength = (u16)urb->actual_length;
/* The IRP is completed */
pWb35Rx->EP3vm_state = VM_COMPLETED;
if (pHwData->SurpriseRemove) /* Must be here, or RxBufferId is invalid */
goto error;
if (pWb35Rx->rx_halt)
goto error;
/* Start to process the data only in successful condition */
pWb35Rx->RxOwner[RxBufferId] = 0; /* Set the owner to driver */
R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress);
/* The URB is completed, check the result */
if (pWb35Rx->EP3VM_status != 0) {
pr_debug("EP3 IoCompleteRoutine return error\n");
pWb35Rx->EP3vm_state = VM_STOP;
goto error;
}
/* For recovering. check if operating in single USB mode */
if (!HAL_USB_MODE_BURST(pHwData)) {
SizeCheck = R00.R00_receive_byte_count;
if ((SizeCheck & 0x03) > 0)
SizeCheck -= 4;
SizeCheck = (SizeCheck + 3) & ~0x03;
SizeCheck += 12; /* 8 + 4 badbeef */
if ((BulkLength > 1600) ||
(SizeCheck > 1600) ||
(BulkLength != SizeCheck) ||
(BulkLength == 0)) { /* Add for fail Urb */
pWb35Rx->EP3vm_state = VM_STOP;
pWb35Rx->Ep3ErrorCount2++;
}
}
/* Indicating the receiving data */
pWb35Rx->ByteReceived += BulkLength;
pWb35Rx->RxBufferSize[RxBufferId] = BulkLength;
if (!pWb35Rx->RxOwner[RxBufferId])
Wb35Rx_indicate(hw);
kfree(pWb35Rx->pDRx);
/* Do the next receive */
Wb35Rx(hw);
return;
error:
pWb35Rx->RxOwner[RxBufferId] = 1; /* Set the owner to hardware */
atomic_dec(&pWb35Rx->RxFireCounter);
pWb35Rx->EP3vm_state = VM_STOP;
}
/* This function cannot reentrain */
static void Wb35Rx(struct ieee80211_hw *hw)
{
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
u8 *pRxBufferAddress;
struct urb *urb = pWb35Rx->RxUrb;
int retv;
u32 RxBufferId;
/* Issuing URB */
if (pHwData->SurpriseRemove)
goto error;
if (pWb35Rx->rx_halt)
goto error;
/* Get RxBuffer's ID */
RxBufferId = pWb35Rx->RxBufferId;
if (!pWb35Rx->RxOwner[RxBufferId]) {
/* It's impossible to run here. */
pr_debug("Rx driver fifo unavailable\n");
goto error;
}
/* Update buffer point, then start to bulkin the data from USB */
pWb35Rx->RxBufferId++;
pWb35Rx->RxBufferId %= MAX_USB_RX_BUFFER_NUMBER;
pWb35Rx->CurrentRxBufferId = RxBufferId;
pWb35Rx->pDRx = kzalloc(MAX_USB_RX_BUFFER, GFP_ATOMIC);
if (!pWb35Rx->pDRx) {
dev_info(&hw->wiphy->dev, "w35und: Rx memory alloc failed\n");
goto error;
}
pRxBufferAddress = pWb35Rx->pDRx;
usb_fill_bulk_urb(urb, pHwData->udev,
usb_rcvbulkpipe(pHwData->udev, 3),
pRxBufferAddress, MAX_USB_RX_BUFFER,
Wb35Rx_Complete, hw);
pWb35Rx->EP3vm_state = VM_RUNNING;
retv = usb_submit_urb(urb, GFP_ATOMIC);
if (retv != 0) {
dev_info(&hw->wiphy->dev, "Rx URB sending error\n");
goto error;
}
return;
error:
/* VM stop */
pWb35Rx->EP3vm_state = VM_STOP;
atomic_dec(&pWb35Rx->RxFireCounter);
}
void Wb35Rx_start(struct ieee80211_hw *hw)
{
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
/* Allow only one thread to run into the Wb35Rx() function */
if (atomic_inc_return(&pWb35Rx->RxFireCounter) == 1) {
pWb35Rx->EP3vm_state = VM_RUNNING;
Wb35Rx(hw);
} else
atomic_dec(&pWb35Rx->RxFireCounter);
}
static void Wb35Rx_reset_descriptor(struct hw_data *pHwData)
{
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
u32 i;
pWb35Rx->ByteReceived = 0;
pWb35Rx->RxProcessIndex = 0;
pWb35Rx->RxBufferId = 0;
pWb35Rx->EP3vm_state = VM_STOP;
pWb35Rx->rx_halt = 0;
/* Initial the Queue. The last buffer is reserved for used
* if the Rx resource is unavailable.
*/
for (i = 0; i < MAX_USB_RX_BUFFER_NUMBER; i++)
pWb35Rx->RxOwner[i] = 1;
}
unsigned char Wb35Rx_initial(struct hw_data *pHwData)
{
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
/* Initial the Buffer Queue */
Wb35Rx_reset_descriptor(pHwData);
pWb35Rx->RxUrb = usb_alloc_urb(0, GFP_ATOMIC);
return !!pWb35Rx->RxUrb;
}
void Wb35Rx_stop(struct hw_data *pHwData)
{
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
/* Canceling the Irp if already sends it out. */
if (pWb35Rx->EP3vm_state == VM_RUNNING) {
/* Only use unlink, let Wb35Rx_destroy to free them */
usb_unlink_urb(pWb35Rx->RxUrb);
pr_debug("EP3 Rx stop\n");
}
}
/* Needs process context */
void Wb35Rx_destroy(struct hw_data *pHwData)
{
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
do {
msleep(10); /* Delay for waiting function enter */
} while (pWb35Rx->EP3vm_state != VM_STOP);
msleep(10); /* Delay for waiting function exit */
usb_free_urb(pWb35Rx->RxUrb);
pr_debug("Wb35Rx_destroy OK\n");
}
#ifndef __WINBOND_WB35RX_F_H
#define __WINBOND_WB35RX_F_H
#include <net/mac80211.h>
#include "wbhal.h"
/*
* Interface function declaration
*/
unsigned char Wb35Rx_initial(struct hw_data *pHwData);
void Wb35Rx_destroy(struct hw_data *pHwData);
void Wb35Rx_stop(struct hw_data *pHwData);
void Wb35Rx_start(struct ieee80211_hw *hw);
#endif
#ifndef __WINBOND_35RX_S_H
#define __WINBOND_35RX_S_H
/* Definition for this module used */
#define MAX_USB_RX_BUFFER 4096 /* This parameter must be 4096 931130.4.f */
#define MAX_USB_RX_BUFFER_NUMBER ETHERNET_RX_DESCRIPTORS /* Maximum 254, 255 is RESERVED ID */
#define RX_INTERFACE 0 /* Interface 1 */
#define RX_PIPE 2 /* Pipe 3 */
#define MAX_PACKET_SIZE 1600 /* 1568 = 8 + 1532 + 4 + 24(IV EIV MIC ICV CRC) for check DMA data 931130.4.g */
#define RX_END_TAG 0x0badbeef
/*
* Internal variable for module
*/
struct wb35_rx {
u32 ByteReceived; /* For calculating throughput of BulkIn */
atomic_t RxFireCounter;/* Does Wb35Rx module fire? */
u8 RxBuffer[MAX_USB_RX_BUFFER_NUMBER][((MAX_USB_RX_BUFFER+3) & ~0x03)];
u16 RxBufferSize[((MAX_USB_RX_BUFFER_NUMBER+1) & ~0x01)];
u8 RxOwner[((MAX_USB_RX_BUFFER_NUMBER+3) & ~0x03)]; /* Ownership of buffer 0:SW 1:HW */
u32 RxProcessIndex; /* The next index to process */
u32 RxBufferId;
u32 EP3vm_state;
u32 rx_halt; /* For VM stopping */
u16 MoreDataSize;
u16 PacketSize;
u32 CurrentRxBufferId; /* For complete routine usage */
u32 Rx3UrbCancel;
u32 LastR1; /* For RSSI reporting */
struct urb *RxUrb;
u32 Ep3ErrorCount2; /* 20060625.1 Usbd for Rx DMA error count */
int EP3VM_status;
u8 *pDRx;
};
#endif /* __WINBOND_35RX_S_H */
This diff is collapsed.
#ifndef __WINBOND_WB35TX_F_H
#define __WINBOND_WB35TX_F_H
#include "core.h"
/*
* ====================================
* Interface function declare
* ====================================
*/
unsigned char Wb35Tx_initial(struct hw_data *hw_data);
void Wb35Tx_destroy(struct hw_data *hw_data);
unsigned char Wb35Tx_get_tx_buffer(struct hw_data *hw_data, u8 **buffer);
void Wb35Tx_EP2VM_start(struct wbsoft_priv *adapter);
void Wb35Tx_start(struct wbsoft_priv *adapter);
void Wb35Tx_stop(struct hw_data *hw_data);
void Wb35Tx_CurrentTime(struct wbsoft_priv *adapter, u32 time_count);
#endif
#ifndef __WINBOND_WB35_TX_S_H
#define __WINBOND_WB35_TX_S_H
#include "mds_s.h"
/* IS89C35 Tx related definition */
#define TX_INTERFACE 0 /* Interface 1 */
#define TX_PIPE 3 /* Endpoint 4 */
#define TX_INTERRUPT 1 /* Endpoint 2 */
#define MAX_INTERRUPT_LENGTH 64 /* It must be 64 for EP2 hardware */
/* Internal variable for module */
struct wb35_tx {
/* For Tx buffer */
u8 TxBuffer[MAX_USB_TX_BUFFER_NUMBER][MAX_USB_TX_BUFFER];
/* For Interrupt pipe */
u8 EP2_buf[MAX_INTERRUPT_LENGTH];
atomic_t TxResultCount; /* For thread control of EP2 931130.4.m */
atomic_t TxFireCounter; /* For thread control of EP4 931130.4.n */
u32 ByteTransfer;
u32 TxSendIndex; /* The next index of Mds array to be sent */
u32 EP2vm_state; /* for EP2vm state */
u32 EP4vm_state; /* for EP4vm state */
u32 tx_halt; /* Stopping VM */
struct urb *Tx4Urb;
struct urb *Tx2Urb;
int EP2VM_status;
int EP4VM_status;
u32 TxFillCount; /* 20060928 */
u32 TxTimer; /* 20060928 Add if sending packet is greater than 13 */
};
#endif
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