Documentation: x86: convert x86_64/boot-options.txt to reST

This converts the plain text documentation to reStructuredText format and
add it to Sphinx TOC tree. No essential content change.
Signed-off-by: Changbin Du <changbin.du@gmail.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>

Documentation/x86/index.rst

@@ -27,3 +27,4 @@ x86-specific Documentation
    resctrl_ui
    usb-legacy-support
    i386/index
+   x86_64/index

Documentation/x86/x86_64/boot-options.txt → Documentation/x86/x86_64/boot-options.rst

-AMD64 specific boot options
+.. SPDX-License-Identifier: GPL-2.0
+
+===========================
+AMD64 Specific Boot Options
+===========================
 
 There are many others (usually documented in driver documentation), but
 only the AMD64 specific ones are listed here.
 
 Machine check
-
-   Please see Documentation/x86/x86_64/machinecheck for sysfs runtime tunables.
+=============
+Please see Documentation/x86/x86_64/machinecheck for sysfs runtime tunables.
 
    mce=off
 		Disable machine check
@@ -64,32 +68,42 @@ Machine check
    mce=recovery
 		Force-enable recoverable machine check code paths
 
-   nomce (for compatibility with i386): same as mce=off
+   nomce (for compatibility with i386)
+		same as mce=off
 
    Everything else is in sysfs now.
 
 APICs
+=====
 
-   apic		 Use IO-APIC. Default
+   apic
+	Use IO-APIC. Default
 
-   noapic	 Don't use the IO-APIC.
+   noapic
+	Don't use the IO-APIC.
 
-   disableapic	 Don't use the local APIC
+   disableapic
+	Don't use the local APIC
 
-   nolapic	 Don't use the local APIC (alias for i386 compatibility)
+   nolapic
+     Don't use the local APIC (alias for i386 compatibility)
 
-   pirq=...	 See Documentation/x86/i386/IO-APIC.txt
+   pirq=...
+	See Documentation/x86/i386/IO-APIC.txt
 
-   noapictimer	 Don't set up the APIC timer
+   noapictimer
+	Don't set up the APIC timer
 
-   no_timer_check Don't check the IO-APIC timer. This can work around
+   no_timer_check
+	Don't check the IO-APIC timer. This can work around
 	problems with incorrect timer initialization on some boards.
+
    apicpmtimer
 	Do APIC timer calibration using the pmtimer. Implies
-		 apicmaintimer. Useful when your PIT timer is totally
-		 broken.
+	apicmaintimer. Useful when your PIT timer is totally broken.
 
 Timing
+======
 
   notsc
     Deprecated, use tsc=unstable instead.
@@ -98,6 +112,7 @@ Timing
     Don't use the HPET timer.
 
 Idle loop
+=========
 
   idle=poll
     Don't do power saving in the idle loop using HLT, but poll for rescheduling
@@ -109,18 +124,26 @@ Idle loop
     It may also interact badly with hyperthreading.
 
 Rebooting
+=========
 
    reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old]
-   bios	  Use the CPU reboot vector for warm reset
-   warm   Don't set the cold reboot flag
-   cold   Set the cold reboot flag
-   triple Force a triple fault (init)
-   kbd    Use the keyboard controller. cold reset (default)
-   acpi   Use the ACPI RESET_REG in the FADT. If ACPI is not configured or the
-          ACPI reset does not work, the reboot path attempts the reset using
-          the keyboard controller.
-   efi    Use efi reset_system runtime service. If EFI is not configured or the
-          EFI reset does not work, the reboot path attempts the reset using
+      bios
+        Use the CPU reboot vector for warm reset
+      warm
+        Don't set the cold reboot flag
+      cold
+        Set the cold reboot flag
+      triple
+        Force a triple fault (init)
+      kbd
+        Use the keyboard controller. cold reset (default)
+      acpi
+        Use the ACPI RESET_REG in the FADT. If ACPI is not configured or
+        the ACPI reset does not work, the reboot path attempts the reset
+        using the keyboard controller.
+      efi
+        Use efi reset_system runtime service. If EFI is not configured or
+        the EFI reset does not work, the reboot path attempts the reset using
         the keyboard controller.
 
    Using warm reset will be much faster especially on big memory
@@ -129,22 +152,26 @@ Rebooting
    on reboot so there may be boot problems on some systems.
 
    reboot=force
-
      Don't stop other CPUs on reboot. This can make reboot more reliable
      in some cases.
 
 Non Executable Mappings
+=======================
 
   noexec=on|off
-
-  on      Enable(default)
-  off     Disable
+    on
+      Enable(default)
+    off
+      Disable
 
 NUMA
+====
 
-  numa=off	Only set up a single NUMA node spanning all memory.
+  numa=off
+    Only set up a single NUMA node spanning all memory.
 
-  numa=noacpi   Don't parse the SRAT table for NUMA setup
+  numa=noacpi
+    Don't parse the SRAT table for NUMA setup
 
   numa=fake=<size>[MG]
     If given as a memory unit, fills all system RAM with nodes of
@@ -159,37 +186,49 @@ NUMA
     physical node into N emulated nodes.
 
 ACPI
-
-  acpi=off	Don't enable ACPI
-  acpi=ht	Use ACPI boot table parsing, but don't enable ACPI
-		interpreter
-  acpi=force	Force ACPI on (currently not needed)
-
-  acpi=strict   Disable out of spec ACPI workarounds.
-
-  acpi_sci={edge,level,high,low}  Set up ACPI SCI interrupt.
-
-  acpi=noirq	Don't route interrupts
-
-  acpi=nocmcff	Disable firmware first mode for corrected errors. This
+====
+
+  acpi=off
+    Don't enable ACPI
+  acpi=ht
+    Use ACPI boot table parsing, but don't enable ACPI interpreter
+  acpi=force
+    Force ACPI on (currently not needed)
+  acpi=strict
+    Disable out of spec ACPI workarounds.
+  acpi_sci={edge,level,high,low}
+    Set up ACPI SCI interrupt.
+  acpi=noirq
+    Don't route interrupts
+  acpi=nocmcff
+    Disable firmware first mode for corrected errors. This
     disables parsing the HEST CMC error source to check if
     firmware has set the FF flag. This may result in
     duplicate corrected error reports.
 
 PCI
-
-  pci=off		Don't use PCI
-  pci=conf1		Use conf1 access.
-  pci=conf2		Use conf2 access.
-  pci=rom		Assign ROMs.
-  pci=assign-busses	Assign busses
-  pci=irqmask=MASK	Set PCI interrupt mask to MASK
-  pci=lastbus=NUMBER	Scan up to NUMBER busses, no matter what the mptable says.
-  pci=noacpi		Don't use ACPI to set up PCI interrupt routing.
+===
+
+  pci=off
+    Don't use PCI
+  pci=conf1
+    Use conf1 access.
+  pci=conf2
+    Use conf2 access.
+  pci=rom
+    Assign ROMs.
+  pci=assign-busses
+    Assign busses
+  pci=irqmask=MASK
+    Set PCI interrupt mask to MASK
+  pci=lastbus=NUMBER
+    Scan up to NUMBER busses, no matter what the mptable says.
+  pci=noacpi
+    Don't use ACPI to set up PCI interrupt routing.
 
 IOMMU (input/output memory management unit)
-
- Multiple x86-64 PCI-DMA mapping implementations exist, for example:
+===========================================
+Multiple x86-64 PCI-DMA mapping implementations exist, for example:
 
    1. <lib/dma-direct.c>: use no hardware/software IOMMU at all
       (e.g. because you have < 3 GB memory).
@@ -209,68 +248,86 @@ IOMMU (input/output memory management unit)
       mapping with memory protection, etc.
       Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
 
+::
+
   iommu=[<size>][,noagp][,off][,force][,noforce]
   [,memaper[=<order>]][,merge][,fullflush][,nomerge]
   [,noaperture][,calgary]
 
-  General iommu options:
-    off                Don't initialize and use any kind of IOMMU.
-    noforce            Don't force hardware IOMMU usage when it is not needed.
-                       (default).
-    force              Force the use of the hardware IOMMU even when it is
+General iommu options:
+
+    off
+      Don't initialize and use any kind of IOMMU.
+    noforce
+      Don't force hardware IOMMU usage when it is not needed. (default).
+    force
+      Force the use of the hardware IOMMU even when it is
       not actually needed (e.g. because < 3 GB memory).
-    soft               Use software bounce buffering (SWIOTLB) (default for
+    soft
+      Use software bounce buffering (SWIOTLB) (default for
       Intel machines). This can be used to prevent the usage
       of an available hardware IOMMU.
 
-  iommu options only relevant to the AMD GART hardware IOMMU:
-    <size>             Set the size of the remapping area in bytes.
-    allowed            Overwrite iommu off workarounds for specific chipsets.
-    fullflush          Flush IOMMU on each allocation (default).
-    nofullflush        Don't use IOMMU fullflush.
-    memaper[=<order>]  Allocate an own aperture over RAM with size 32MB<<order.
+iommu options only relevant to the AMD GART hardware IOMMU:
+
+    <size>
+      Set the size of the remapping area in bytes.
+    allowed
+      Overwrite iommu off workarounds for specific chipsets.
+    fullflush
+      Flush IOMMU on each allocation (default).
+    nofullflush
+      Don't use IOMMU fullflush.
+    memaper[=<order>]
+      Allocate an own aperture over RAM with size 32MB<<order.
       (default: order=1, i.e. 64MB)
-    merge              Do scatter-gather (SG) merging. Implies "force"
-                       (experimental).
-    nomerge            Don't do scatter-gather (SG) merging.
-    noaperture         Ask the IOMMU not to touch the aperture for AGP.
-    noagp              Don't initialize the AGP driver and use full aperture.
-    panic              Always panic when IOMMU overflows.
-    calgary            Use the Calgary IOMMU if it is available
-
-  iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
-  implementation:
+    merge
+      Do scatter-gather (SG) merging. Implies "force" (experimental).
+    nomerge
+      Don't do scatter-gather (SG) merging.
+    noaperture
+      Ask the IOMMU not to touch the aperture for AGP.
+    noagp
+      Don't initialize the AGP driver and use full aperture.
+    panic
+      Always panic when IOMMU overflows.
+    calgary
+      Use the Calgary IOMMU if it is available
+
+iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
+implementation:
+
     swiotlb=<pages>[,force]
-    <pages>            Prereserve that many 128K pages for the software IO
-                       bounce buffering.
-    force              Force all IO through the software TLB.
+      <pages>
+        Prereserve that many 128K pages for the software IO bounce buffering.
+      force
+        Force all IO through the software TLB.
 
-  Settings for the IBM Calgary hardware IOMMU currently found in IBM
-  pSeries and xSeries machines:
+Settings for the IBM Calgary hardware IOMMU currently found in IBM
+pSeries and xSeries machines
 
     calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
+      Set the size of each PCI slot's translation table when using the
+      Calgary IOMMU. This is the size of the translation table itself
+      in main memory. The smallest table, 64k, covers an IO space of
+      32MB; the largest, 8MB table, can cover an IO space of 4GB.
+      Normally the kernel will make the right choice by itself.
     calgary=[translate_empty_slots]
+      Enable translation even on slots that have no devices attached to
+      them, in case a device will be hotplugged in the future.
     calgary=[disable=<PCI bus number>]
-    panic              Always panic when IOMMU overflows
-
-    64k,...,8M - Set the size of each PCI slot's translation table
-    when using the Calgary IOMMU. This is the size of the translation
-    table itself in main memory. The smallest table, 64k, covers an IO
-    space of 32MB; the largest, 8MB table, can cover an IO space of
-    4GB. Normally the kernel will make the right choice by itself.
-
-    translate_empty_slots - Enable translation even on slots that have
-    no devices attached to them, in case a device will be hotplugged
-    in the future.
-
-    disable=<PCI bus number> - Disable translation on a given PHB. For
+      Disable translation on a given PHB. For
       example, the built-in graphics adapter resides on the first bridge
       (PCI bus number 0); if translation (isolation) is enabled on this
       bridge, X servers that access the hardware directly from user
       space might stop working. Use this option if you have devices that
       are accessed from userspace directly on some PCI host bridge.
+    panic
+      Always panic when IOMMU overflows
+
 
 Miscellaneous
+=============
 
   nogbpages
     Do not use GB pages for kernel direct mappings.

Documentation/x86/x86_64/index.rst

+.. SPDX-License-Identifier: GPL-2.0
+
+==============
+x86_64 Support
+==============
+
+.. toctree::
+   :maxdepth: 2
+
+   boot-options