Commit c30a27dc authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Bjorn Andersson

arm64: dts: qcom: msm8998: Fix the PCI I/O port range

For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI address
(0x1b200000) specified in the ranges property for I/O region.

Fixes: b84dfd17 ("arm64: dts: qcom: msm8998: Add PCIe PHY and RC nodes")
Reported-by: default avatarArnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-3-manivannan.sadhasivam@linaro.org
parent 67aa109e
...@@ -922,7 +922,7 @@ pcie0: pci@1c00000 { ...@@ -922,7 +922,7 @@ pcie0: pci@1c00000 {
phy-names = "pciephy"; phy-names = "pciephy";
status = "disabled"; status = "disabled";
ranges = <0x01000000 0x0 0x1b200000 0x1b200000 0x0 0x100000>, ranges = <0x01000000 0x0 0x00000000 0x1b200000 0x0 0x100000>,
<0x02000000 0x0 0x1b300000 0x1b300000 0x0 0xd00000>; <0x02000000 0x0 0x1b300000 0x1b300000 0x0 0xd00000>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
......
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