drm/amd/display: move dp irq handler functions from dc_link_dp to link_dp_irq_handler

Create new files link_dp_irq_handler.c and link_dp_irq_handler.h, and
move DP irq handler functions into them.
Reviewed-by: George Shen <George.Shen@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

@@ -1300,7 +1300,7 @@ static void dm_handle_hpd_rx_offload_work(struct work_struct *work)
 		sizeof(test_response));
 	}
 	else if ((dc_link->connector_signal != SIGNAL_TYPE_EDP) &&
-			hpd_rx_irq_check_link_loss_status(dc_link, &offload_work->data) &&
+			dc_link_check_link_loss_status(dc_link, &offload_work->data) &&
 			dc_link_dp_allow_hpd_rx_irq(dc_link)) {
 		dc_link_dp_handle_link_loss(dc_link);
 		spin_lock_irqsave(&offload_work->offload_wq->offload_lock, flags);

drivers/gpu/drm/amd/display/dc/dc_link.h

@@ -431,7 +431,8 @@ bool dc_link_wait_for_t12(struct dc_link *link);
 void dc_link_dp_handle_automated_test(struct dc_link *link);
 void dc_link_dp_handle_link_loss(struct dc_link *link);
 bool dc_link_dp_allow_hpd_rx_irq(const struct dc_link *link);
-
+bool dc_link_check_link_loss_status(struct dc_link *link,
+				       union hpd_irq_data *hpd_irq_dpcd_data);
 struct dc_sink_init_data;
 
 struct dc_sink *dc_link_add_remote_sink(

drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h

@@ -51,12 +51,6 @@ bool dp_validate_mode_timing(
 	struct dc_link *link,
 	const struct dc_crtc_timing *timing);
 
-bool hpd_rx_irq_check_link_loss_status(struct dc_link *link,
-				       union hpd_irq_data *hpd_irq_dpcd_data);
-enum dc_status read_hpd_rx_irq_data(
-	struct dc_link *link,
-	union hpd_irq_data *irq_data);
-
 void dp_enable_mst_on_sink(struct dc_link *link, bool enable);
 
 enum dc_status dp_set_fec_ready(struct dc_link *link, const struct link_resource *link_res, bool ready);

drivers/gpu/drm/amd/display/dc/link/Makefile

@@ -48,7 +48,7 @@ LINK_PROTOCOLS = link_hpd.o link_ddc.o link_dpcd.o link_dp_dpia.o \
 link_dp_training.o link_dp_training_8b_10b.o link_dp_training_128b_132b.o \
 link_dp_training_dpia.o link_dp_training_auxless.o \
 link_dp_training_fixed_vs_pe_retimer.o link_dp_phy.o link_dp_capability.o \
-link_edp_panel_control.o
+link_edp_panel_control.o link_dp_irq_handler.o
 
 AMD_DAL_LINK_PROTOCOLS = $(addprefix $(AMDDALPATH)/dc/link/protocols/, \
 $(LINK_PROTOCOLS))

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

@@ -40,6 +40,7 @@
 #include "link_dp_dpia.h"
 #include "link_dp_phy.h"
 #include "link_edp_panel_control.h"
+#include "link_dp_irq_handler.h"
 #include "link/accessories/link_dp_trace.h"
 #include "link_dp_training.h"
 #include "atomfirmware.h"
@@ -2127,8 +2128,8 @@ static bool dp_verify_link_cap(
 		if (status == LINK_TRAINING_SUCCESS) {
 			success = true;
 			udelay(1000);
-			if (read_hpd_rx_irq_data(link, &irq_data) == DC_OK &&
-					hpd_rx_irq_check_link_loss_status(
+			if (dp_read_hpd_rx_irq_data(link, &irq_data) == DC_OK &&
+					dc_link_check_link_loss_status(
 							link,
 							&irq_data))
 				(*fail_count)++;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c

@@ -104,4 +104,3 @@ bool dc_link_dpia_query_hpd_status(struct dc_link *link)
 
 	return is_hpd_high;
 }
-

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.h

+/*
+ * Copyright 2022 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef __DC_LINK_DP_IRQ_HANDLER_H__
+#define __DC_LINK_DP_IRQ_HANDLER_H__
+
+#include "link.h"
+
+enum dc_status dp_read_hpd_rx_irq_data(
+	struct dc_link *link,
+	union hpd_irq_data *irq_data);
+
+#endif /* __DC_LINK_DP_IRQ_HANDLER_H__ */

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

@@ -240,7 +240,7 @@ enum dpcd_training_patterns
 	return dpcd_tr_pattern;
 }
 
-static uint8_t get_nibble_at_index(const uint8_t *buf,
+uint8_t dp_get_nibble_at_index(const uint8_t *buf,
 	uint32_t index)
 {
 	uint8_t nibble;
@@ -520,7 +520,7 @@ enum link_training_result dp_check_link_loss_status(
 		/*
 		 * check lanes status
 		 */
-		lane_status.raw = get_nibble_at_index(&dpcd_buf[2], lane);
+		lane_status.raw = dp_get_nibble_at_index(&dpcd_buf[2], lane);
 
 		if (!lane_status.bits.CHANNEL_EQ_DONE_0 ||
 			!lane_status.bits.CR_DONE_0 ||
@@ -579,9 +579,9 @@ enum dc_status dp_get_lane_status_and_lane_adjust(
 		lane++) {
 
 		ln_status[lane].raw =
-			get_nibble_at_index(&dpcd_buf[0], lane);
+			dp_get_nibble_at_index(&dpcd_buf[0], lane);
 		ln_adjust[lane].raw =
-			get_nibble_at_index(&dpcd_buf[lane_adjust_offset], lane);
+			dp_get_nibble_at_index(&dpcd_buf[lane_adjust_offset], lane);
 	}
 
 	ln_align->raw = dpcd_buf[2];

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.h

@@ -176,4 +176,7 @@ void dp_log_training_result(
 
 uint32_t dp_translate_training_aux_read_interval(
 		uint32_t dpcd_aux_read_interval);
+
+uint8_t dp_get_nibble_at_index(const uint8_t *buf,
+	uint32_t index);
 #endif /* __DC_LINK_DP_TRAINING_H__ */