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Kirill Smelkov
linux
Commits
d25a3bf1
Commit
d25a3bf1
authored
Mar 28, 2017
by
Thierry Reding
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arm64: tegra: Add memory controller on Tegra186
Signed-off-by:
Thierry Reding
<
treding@nvidia.com
>
parent
85593b75
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arch/arm64/boot/dts/nvidia/tegra186.dtsi
arch/arm64/boot/dts/nvidia/tegra186.dtsi
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arch/arm64/boot/dts/nvidia/tegra186.dtsi
View file @
d25a3bf1
...
@@ -3,6 +3,7 @@
...
@@ -3,6 +3,7 @@
#include <dt-bindings/gpio/tegra186-gpio.h>
#include <dt-bindings/gpio/tegra186-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/tegra186-hsp.h>
#include <dt-bindings/mailbox/tegra186-hsp.h>
#include <dt-bindings/memory/tegra186-mc.h>
#include <dt-bindings/power/tegra186-powergate.h>
#include <dt-bindings/power/tegra186-powergate.h>
#include <dt-bindings/reset/tegra186-reset.h>
#include <dt-bindings/reset/tegra186-reset.h>
#include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
#include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
...
@@ -67,6 +68,12 @@ ethernet@2490000 {
...
@@ -67,6 +68,12 @@ ethernet@2490000 {
snps,rxpbl = <8>;
snps,rxpbl = <8>;
};
};
memory-controller@2c00000 {
compatible = "nvidia,tegra186-mc";
reg = <0x0 0x02c00000 0x0 0xb0000>;
status = "disabled";
};
uarta: serial@3100000 {
uarta: serial@3100000 {
compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
reg = <0x0 0x03100000 0x0 0x40>;
reg = <0x0 0x03100000 0x0 0x40>;
...
...
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