Commit d52a826b authored by bayi cheng's avatar bayi cheng Committed by Mark Brown

spi: spi-mtk-nor: Optimize timeout for dma read

The timeout value of the current dma read is unreasonable. For example,
If the spi flash clock is 26Mhz, It will takes about 1.3ms to read a
4KB data in spi mode. But the actual measurement exceeds 50s when a
dma read timeout is encountered.

In order to be more accurately, It is necessary to use usecs_to_jiffies,
After modification, the measured timeout value is about 130ms.
Signed-off-by: default avatarbayi cheng <bayi.cheng@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221114081327.25750-1-bayi.cheng@mediatek.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 6c6871cd
...@@ -354,7 +354,7 @@ static int mtk_nor_dma_exec(struct mtk_nor *sp, u32 from, unsigned int length, ...@@ -354,7 +354,7 @@ static int mtk_nor_dma_exec(struct mtk_nor *sp, u32 from, unsigned int length,
dma_addr_t dma_addr) dma_addr_t dma_addr)
{ {
int ret = 0; int ret = 0;
ulong delay; u32 delay, timeout;
u32 reg; u32 reg;
writel(from, sp->base + MTK_NOR_REG_DMA_FADR); writel(from, sp->base + MTK_NOR_REG_DMA_FADR);
...@@ -376,15 +376,16 @@ static int mtk_nor_dma_exec(struct mtk_nor *sp, u32 from, unsigned int length, ...@@ -376,15 +376,16 @@ static int mtk_nor_dma_exec(struct mtk_nor *sp, u32 from, unsigned int length,
mtk_nor_rmw(sp, MTK_NOR_REG_DMA_CTL, MTK_NOR_DMA_START, 0); mtk_nor_rmw(sp, MTK_NOR_REG_DMA_CTL, MTK_NOR_DMA_START, 0);
delay = CLK_TO_US(sp, (length + 5) * BITS_PER_BYTE); delay = CLK_TO_US(sp, (length + 5) * BITS_PER_BYTE);
timeout = (delay + 1) * 100;
if (sp->has_irq) { if (sp->has_irq) {
if (!wait_for_completion_timeout(&sp->op_done, if (!wait_for_completion_timeout(&sp->op_done,
(delay + 1) * 100)) usecs_to_jiffies(max(timeout, 10000U))))
ret = -ETIMEDOUT; ret = -ETIMEDOUT;
} else { } else {
ret = readl_poll_timeout(sp->base + MTK_NOR_REG_DMA_CTL, reg, ret = readl_poll_timeout(sp->base + MTK_NOR_REG_DMA_CTL, reg,
!(reg & MTK_NOR_DMA_START), delay / 3, !(reg & MTK_NOR_DMA_START), delay / 3,
(delay + 1) * 100); timeout);
} }
if (ret < 0) if (ret < 0)
......
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